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aae8736426
The CWB mux has its own registers and set of operations. Add dpu_hw_cwb abstraction to allow driver to configure the CWB mux. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/629254/ Link: https://lore.kernel.org/r/20241216-concurrent-wb-v4-12-fe220297a7f0@quicinc.com [DB: added #include <linux/bitfield.h>] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
71 lines
1.6 KiB
C
71 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved
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*/
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#ifndef _DPU_HW_CWB_H
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#define _DPU_HW_CWB_H
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#include "dpu_hw_util.h"
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struct dpu_hw_cwb;
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enum cwb_mode_input {
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INPUT_MODE_LM_OUT,
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INPUT_MODE_DSPP_OUT,
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INPUT_MODE_MAX
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};
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/**
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* struct dpu_hw_cwb_setup_cfg : Describes configuration for CWB mux
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* @pp_idx: Index of the real-time pinpong that the CWB mux will
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* feed the CWB mux
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* @input: Input tap point
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*/
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struct dpu_hw_cwb_setup_cfg {
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enum dpu_pingpong pp_idx;
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enum cwb_mode_input input;
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};
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/**
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*
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* struct dpu_hw_cwb_ops : Interface to the cwb hw driver functions
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* @config_cwb: configure CWB mux
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*/
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struct dpu_hw_cwb_ops {
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void (*config_cwb)(struct dpu_hw_cwb *ctx,
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struct dpu_hw_cwb_setup_cfg *cwb_cfg);
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};
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/**
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* struct dpu_hw_cwb : CWB mux driver object
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* @base: Hardware block base structure
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* @hw: Block hardware details
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* @idx: CWB index
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* @ops: handle to operations possible for this CWB
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*/
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struct dpu_hw_cwb {
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struct dpu_hw_blk base;
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struct dpu_hw_blk_reg_map hw;
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enum dpu_cwb idx;
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struct dpu_hw_cwb_ops ops;
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};
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/**
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* dpu_hw_cwb - convert base object dpu_hw_base to container
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* @hw: Pointer to base hardware block
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* return: Pointer to hardware block container
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*/
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static inline struct dpu_hw_cwb *to_dpu_hw_cwb(struct dpu_hw_blk *hw)
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{
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return container_of(hw, struct dpu_hw_cwb, base);
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}
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struct dpu_hw_cwb *dpu_hw_cwb_init(struct drm_device *dev,
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const struct dpu_cwb_cfg *cfg,
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void __iomem *addr);
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#endif /*_DPU_HW_CWB_H */
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