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86313a9cd1
Unfortunately the tooling doesn't check documents placed before funciton prototypes. Such comments frequently become outdated, miss several params, etc. Move documentation for the functions to be placed before the actual function body, allowing 'make W=1' to actually check these comments and report an error. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/622690/ Link: https://lore.kernel.org/r/20241102-dpu-docs-rework-v1-1-d735853fd6db@linaro.org
76 lines
1.9 KiB
C
76 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DPU_HW_INTERRUPTS_H
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#define _DPU_HW_INTERRUPTS_H
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#include <linux/types.h>
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#include "dpu_hwio.h"
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#include "dpu_hw_catalog.h"
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#include "dpu_hw_util.h"
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#include "dpu_hw_mdss.h"
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/* When making changes be sure to sync with dpu_intr_set */
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enum dpu_hw_intr_reg {
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MDP_SSPP_TOP0_INTR,
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MDP_SSPP_TOP0_INTR2,
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MDP_SSPP_TOP0_HIST_INTR,
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/* All MDP_INTFn_INTR should come sequentially */
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MDP_INTF0_INTR,
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MDP_INTF1_INTR,
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MDP_INTF2_INTR,
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MDP_INTF3_INTR,
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MDP_INTF4_INTR,
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MDP_INTF5_INTR,
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MDP_INTF6_INTR,
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MDP_INTF7_INTR,
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MDP_INTF8_INTR,
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MDP_INTF1_TEAR_INTR,
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MDP_INTF2_TEAR_INTR,
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MDP_AD4_0_INTR,
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MDP_AD4_1_INTR,
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MDP_INTR_MAX,
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};
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#define MDP_INTFn_INTR(intf) (MDP_INTF0_INTR + (intf - INTF_0))
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#define DPU_IRQ_IDX(reg_idx, offset) (1 + reg_idx * 32 + offset)
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#define DPU_IRQ_REG(irq_idx) ((irq_idx - 1) / 32)
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#define DPU_IRQ_BIT(irq_idx) ((irq_idx - 1) % 32)
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#define DPU_NUM_IRQS (MDP_INTR_MAX * 32)
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struct dpu_hw_intr_entry {
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void (*cb)(void *arg);
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void *arg;
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atomic_t count;
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};
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/**
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* struct dpu_hw_intr: hw interrupts handling data structure
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* @hw: virtual address mapping
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* @ops: function pointer mapping for IRQ handling
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* @cache_irq_mask: array of IRQ enable masks reg storage created during init
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* @save_irq_status: array of IRQ status reg storage created during init
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* @irq_lock: spinlock for accessing IRQ resources
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* @irq_cb_tbl: array of IRQ callbacks
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*/
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struct dpu_hw_intr {
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struct dpu_hw_blk_reg_map hw;
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u32 cache_irq_mask[MDP_INTR_MAX];
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u32 *save_irq_status;
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spinlock_t irq_lock;
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unsigned long irq_mask;
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const struct dpu_intr_reg *intr_set;
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struct dpu_hw_intr_entry irq_tbl[DPU_NUM_IRQS];
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};
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struct dpu_hw_intr *dpu_hw_intr_init(struct drm_device *dev,
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void __iomem *addr,
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const struct dpu_mdss_cfg *m);
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#endif
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