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Only several SSPP blocks support such features as YUV output or scaling, thus different DRM planes have different features. Properly utilizing all planes requires the attention of the compositor, who should prefer simpler planes to YUV-supporting ones. Otherwise it is very easy to end up in a situation when all featureful planes are already allocated for simple windows, leaving no spare plane for YUV playback. To solve this problem make all planes virtual. Each plane is registered as if it supports all possible features, but then at the runtime during the atomic_check phase the driver selects backing SSPP block for each plane. As the planes are attached to the CRTC and not the encoder, the SSPP blocks are also allocated per CRTC ID (all other resources are currently allocated per encoder ID). This also matches the hardware requirement, where both rectangles of a single SSPP can only be used with the LM pair. Note, this does not provide support for using two different SSPP blocks for a single plane or using two rectangles of an SSPP to drive two planes. Each plane still gets its own SSPP and can utilize either a solo rectangle or both multirect rectangles depending on the resolution. Note #2: By default support for virtual planes is turned off and the driver still uses old code path with preallocated SSPP block for each plane. To enable virtual planes, pass 'msm.dpu_use_virtual_planes=1' kernel parameter. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/629022/ Link: https://lore.kernel.org/r/20241215-dpu-virtual-wide-v8-1-65221f213ce1@linaro.org
85 lines
2.5 KiB
C
85 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#ifndef _DPU_PLANE_H_
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#define _DPU_PLANE_H_
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#include <drm/drm_crtc.h>
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#include "dpu_kms.h"
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#include "dpu_hw_mdss.h"
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#include "dpu_hw_sspp.h"
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/**
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* struct dpu_plane_state: Define dpu extension of drm plane state object
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* @base: base drm plane state object
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* @aspace: pointer to address space for input/output buffers
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* @pipe: software pipe description
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* @r_pipe: software pipe description of the second pipe
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* @pipe_cfg: software pipe configuration
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* @r_pipe_cfg: software pipe configuration for the second pipe
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* @stage: assigned by crtc blender
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* @needs_qos_remap: qos remap settings need to be updated
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* @multirect_index: index of the rectangle of SSPP
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* @multirect_mode: parallel or time multiplex multirect mode
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* @pending: whether the current update is still pending
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* @plane_fetch_bw: calculated BW per plane
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* @plane_clk: calculated clk per plane
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* @needs_dirtyfb: whether attached CRTC needs pixel data explicitly flushed
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* @layout: framebuffer memory layout
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*/
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struct dpu_plane_state {
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struct drm_plane_state base;
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struct msm_gem_address_space *aspace;
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struct dpu_sw_pipe pipe;
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struct dpu_sw_pipe r_pipe;
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struct dpu_sw_pipe_cfg pipe_cfg;
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struct dpu_sw_pipe_cfg r_pipe_cfg;
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enum dpu_stage stage;
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bool needs_qos_remap;
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bool pending;
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u64 plane_fetch_bw;
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u64 plane_clk;
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bool needs_dirtyfb;
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struct dpu_hw_fmt_layout layout;
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};
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#define to_dpu_plane_state(x) \
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container_of(x, struct dpu_plane_state, base)
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void dpu_plane_flush(struct drm_plane *plane);
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void dpu_plane_set_error(struct drm_plane *plane, bool error);
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struct drm_plane *dpu_plane_init(struct drm_device *dev,
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uint32_t pipe, enum drm_plane_type type,
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unsigned long possible_crtcs);
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struct drm_plane *dpu_plane_init_virtual(struct drm_device *dev,
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enum drm_plane_type type,
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unsigned long possible_crtcs);
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int dpu_plane_color_fill(struct drm_plane *plane,
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uint32_t color, uint32_t alpha);
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#ifdef CONFIG_DEBUG_FS
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void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);
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#else
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static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}
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#endif
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int dpu_assign_plane_resources(struct dpu_global_state *global_state,
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struct drm_atomic_state *state,
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struct drm_crtc *crtc,
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struct drm_plane_state **states,
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unsigned int num_planes);
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#endif /* _DPU_PLANE_H_ */
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