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When flushing the serial port's buffer, uart_flush_buffer() calls
kfifo_reset() but if there is an outstanding DMA transfer then the
completion function will consume data from the kfifo via
uart_xmit_advance(), underflowing and leading to ongoing DMA as the
driver tries to transmit another 2^32 bytes.
This is readily reproduced with serial-generic and amidi sending even
short messages as closing the device on exit will wait for the fifo to
drain and in the underflow case amidi hangs for 30 seconds on exit in
tty_wait_until_sent(). A trace of that gives:
kworker/1:1-84 [001] 51.769423: bprint: serial8250_tx_dma: tx_size=3 fifo_len=3
amidi-763 [001] 51.769460: bprint: uart_flush_buffer: resetting fifo
irq/21-fe530000-76 [000] 51.769474: bprint: __dma_tx_complete: tx_size=3
irq/21-fe530000-76 [000] 51.769479: bprint: serial8250_tx_dma: tx_size=4096 fifo_len=4294967293
irq/21-fe530000-76 [000] 51.781295: bprint: __dma_tx_complete: tx_size=4096
irq/21-fe530000-76 [000] 51.781301: bprint: serial8250_tx_dma: tx_size=4096 fifo_len=4294963197
irq/21-fe530000-76 [000] 51.793131: bprint: __dma_tx_complete: tx_size=4096
irq/21-fe530000-76 [000] 51.793135: bprint: serial8250_tx_dma: tx_size=4096 fifo_len=4294959101
irq/21-fe530000-76 [000] 51.804949: bprint: __dma_tx_complete: tx_size=4096
Since the port lock is held in when the kfifo is reset in
uart_flush_buffer() and in __dma_tx_complete(), adding a flush_buffer
hook to adjust the outstanding DMA byte count is sufficient to avoid the
kfifo underflow.
Fixes: 9ee4b83e51 ("serial: 8250: Add support for dmaengine")
Cc: stable <stable@kernel.org>
Signed-off-by: John Keeping <jkeeping@inmusicbrands.com>
Link: https://lore.kernel.org/r/20250208124148.1189191-1-jkeeping@inmusicbrands.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
328 lines
7.7 KiB
C
328 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* 8250_dma.c - DMA Engine API support for 8250.c
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*
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* Copyright (C) 2013 Intel Corporation
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*/
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_reg.h>
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#include <linux/dma-mapping.h>
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#include "8250.h"
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static void __dma_tx_complete(void *param)
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{
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struct uart_8250_port *p = param;
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struct uart_8250_dma *dma = p->dma;
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struct tty_port *tport = &p->port.state->port;
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unsigned long flags;
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int ret;
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dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
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UART_XMIT_SIZE, DMA_TO_DEVICE);
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uart_port_lock_irqsave(&p->port, &flags);
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dma->tx_running = 0;
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uart_xmit_advance(&p->port, dma->tx_size);
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if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
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uart_write_wakeup(&p->port);
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ret = serial8250_tx_dma(p);
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if (ret || !dma->tx_running)
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serial8250_set_THRI(p);
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uart_port_unlock_irqrestore(&p->port, flags);
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}
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static void __dma_rx_complete(struct uart_8250_port *p)
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{
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struct uart_8250_dma *dma = p->dma;
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struct tty_port *tty_port = &p->port.state->port;
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struct dma_tx_state state;
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enum dma_status dma_status;
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int count;
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/*
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* New DMA Rx can be started during the completion handler before it
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* could acquire port's lock and it might still be ongoing. Don't to
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* anything in such case.
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*/
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dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
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if (dma_status == DMA_IN_PROGRESS)
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return;
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count = dma->rx_size - state.residue;
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tty_insert_flip_string(tty_port, dma->rx_buf, count);
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p->port.icount.rx += count;
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dma->rx_running = 0;
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tty_flip_buffer_push(tty_port);
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}
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static void dma_rx_complete(void *param)
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{
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struct uart_8250_port *p = param;
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struct uart_8250_dma *dma = p->dma;
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unsigned long flags;
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uart_port_lock_irqsave(&p->port, &flags);
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if (dma->rx_running)
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__dma_rx_complete(p);
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/*
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* Cannot be combined with the previous check because __dma_rx_complete()
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* changes dma->rx_running.
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*/
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if (!dma->rx_running && (serial_lsr_in(p) & UART_LSR_DR))
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p->dma->rx_dma(p);
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uart_port_unlock_irqrestore(&p->port, flags);
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}
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int serial8250_tx_dma(struct uart_8250_port *p)
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{
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struct uart_8250_dma *dma = p->dma;
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struct tty_port *tport = &p->port.state->port;
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struct dma_async_tx_descriptor *desc;
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struct uart_port *up = &p->port;
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struct scatterlist *sg;
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struct scatterlist sgl[2];
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int i;
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int ret;
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if (dma->tx_running) {
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if (up->x_char) {
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dmaengine_pause(dma->txchan);
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uart_xchar_out(up, UART_TX);
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dmaengine_resume(dma->txchan);
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}
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return 0;
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} else if (up->x_char) {
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uart_xchar_out(up, UART_TX);
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}
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if (uart_tx_stopped(&p->port) || kfifo_is_empty(&tport->xmit_fifo)) {
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/* We have been called from __dma_tx_complete() */
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return 0;
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}
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serial8250_do_prepare_tx_dma(p);
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sg_init_table(sgl, ARRAY_SIZE(sgl));
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ret = kfifo_dma_out_prepare_mapped(&tport->xmit_fifo, sgl, ARRAY_SIZE(sgl),
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UART_XMIT_SIZE, dma->tx_addr);
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dma->tx_size = 0;
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for_each_sg(sgl, sg, ret, i)
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dma->tx_size += sg_dma_len(sg);
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desc = dmaengine_prep_slave_sg(dma->txchan, sgl, ret,
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DMA_MEM_TO_DEV,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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ret = -EBUSY;
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goto err;
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}
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dma->tx_running = 1;
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desc->callback = __dma_tx_complete;
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desc->callback_param = p;
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dma->tx_cookie = dmaengine_submit(desc);
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dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
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UART_XMIT_SIZE, DMA_TO_DEVICE);
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dma_async_issue_pending(dma->txchan);
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serial8250_clear_THRI(p);
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dma->tx_err = 0;
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return 0;
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err:
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dma->tx_err = 1;
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return ret;
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}
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void serial8250_tx_dma_flush(struct uart_8250_port *p)
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{
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struct uart_8250_dma *dma = p->dma;
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if (!dma->tx_running)
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return;
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/*
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* kfifo_reset() has been called by the serial core, avoid
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* advancing and underflowing in __dma_tx_complete().
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*/
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dma->tx_size = 0;
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dmaengine_terminate_async(dma->rxchan);
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}
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int serial8250_rx_dma(struct uart_8250_port *p)
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{
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struct uart_8250_dma *dma = p->dma;
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struct dma_async_tx_descriptor *desc;
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if (dma->rx_running)
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return 0;
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serial8250_do_prepare_rx_dma(p);
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desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
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dma->rx_size, DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc)
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return -EBUSY;
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dma->rx_running = 1;
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desc->callback = dma_rx_complete;
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desc->callback_param = p;
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dma->rx_cookie = dmaengine_submit(desc);
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dma_async_issue_pending(dma->rxchan);
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return 0;
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}
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void serial8250_rx_dma_flush(struct uart_8250_port *p)
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{
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struct uart_8250_dma *dma = p->dma;
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if (dma->rx_running) {
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dmaengine_pause(dma->rxchan);
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__dma_rx_complete(p);
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dmaengine_terminate_async(dma->rxchan);
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}
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}
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EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush);
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int serial8250_request_dma(struct uart_8250_port *p)
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{
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struct uart_8250_dma *dma = p->dma;
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phys_addr_t rx_dma_addr = dma->rx_dma_addr ?
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dma->rx_dma_addr : p->port.mapbase;
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phys_addr_t tx_dma_addr = dma->tx_dma_addr ?
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dma->tx_dma_addr : p->port.mapbase;
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dma_cap_mask_t mask;
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struct dma_slave_caps caps;
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int ret;
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/* Default slave configuration parameters */
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dma->rxconf.direction = DMA_DEV_TO_MEM;
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dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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dma->rxconf.src_addr = rx_dma_addr + UART_RX;
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dma->txconf.direction = DMA_MEM_TO_DEV;
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dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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dma->txconf.dst_addr = tx_dma_addr + UART_TX;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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/* Get a channel for RX */
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dma->rxchan = dma_request_slave_channel_compat(mask,
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dma->fn, dma->rx_param,
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p->port.dev, "rx");
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if (!dma->rxchan)
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return -ENODEV;
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/* 8250 rx dma requires dmaengine driver to support pause/terminate */
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ret = dma_get_slave_caps(dma->rxchan, &caps);
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if (ret)
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goto release_rx;
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if (!caps.cmd_pause || !caps.cmd_terminate ||
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caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
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ret = -EINVAL;
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goto release_rx;
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}
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dmaengine_slave_config(dma->rxchan, &dma->rxconf);
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/* Get a channel for TX */
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dma->txchan = dma_request_slave_channel_compat(mask,
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dma->fn, dma->tx_param,
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p->port.dev, "tx");
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if (!dma->txchan) {
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ret = -ENODEV;
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goto release_rx;
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}
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/* 8250 tx dma requires dmaengine driver to support terminate */
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ret = dma_get_slave_caps(dma->txchan, &caps);
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if (ret)
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goto err;
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if (!caps.cmd_terminate) {
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ret = -EINVAL;
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goto err;
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}
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dmaengine_slave_config(dma->txchan, &dma->txconf);
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/* RX buffer */
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if (!dma->rx_size)
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dma->rx_size = PAGE_SIZE;
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dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
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&dma->rx_addr, GFP_KERNEL);
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if (!dma->rx_buf) {
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ret = -ENOMEM;
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goto err;
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}
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/* TX buffer */
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dma->tx_addr = dma_map_single(dma->txchan->device->dev,
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p->port.state->port.xmit_buf,
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UART_XMIT_SIZE,
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DMA_TO_DEVICE);
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if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
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dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
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dma->rx_buf, dma->rx_addr);
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ret = -ENOMEM;
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goto err;
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}
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dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
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return 0;
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err:
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dma_release_channel(dma->txchan);
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release_rx:
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dma_release_channel(dma->rxchan);
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return ret;
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}
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EXPORT_SYMBOL_GPL(serial8250_request_dma);
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void serial8250_release_dma(struct uart_8250_port *p)
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{
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struct uart_8250_dma *dma = p->dma;
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if (!dma)
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return;
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/* Release RX resources */
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dmaengine_terminate_sync(dma->rxchan);
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dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
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dma->rx_addr);
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dma_release_channel(dma->rxchan);
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dma->rxchan = NULL;
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/* Release TX resources */
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dmaengine_terminate_sync(dma->txchan);
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dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
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UART_XMIT_SIZE, DMA_TO_DEVICE);
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dma_release_channel(dma->txchan);
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dma->txchan = NULL;
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dma->tx_running = 0;
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dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
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}
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EXPORT_SYMBOL_GPL(serial8250_release_dma);
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