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Do some testing of the signal handling for GCS, checking that a GCS frame has the expected information in it and that the expected signals are delivered with invalid operations. Reviewed-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org> Tested-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20241001-arm64-gcs-v13-37-222b78d87eee@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
63 lines
1.1 KiB
C
63 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 ARM Limited
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*/
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#include <errno.h>
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#include <signal.h>
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#include <unistd.h>
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#include <sys/mman.h>
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#include <sys/prctl.h>
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#include "test_signals_utils.h"
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#include "testcases.h"
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/*
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* We should get this from asm/siginfo.h but the testsuite is being
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* clever with redefining siginfo_t.
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*/
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#ifndef SEGV_CPERR
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#define SEGV_CPERR 10
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#endif
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static inline void gcsss1(uint64_t Xt)
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{
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asm volatile (
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"sys #3, C7, C7, #2, %0\n"
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:
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: "rZ" (Xt)
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: "memory");
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}
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static int gcs_op_fault_trigger(struct tdescr *td)
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{
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/*
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* The slot below our current GCS should be in a valid GCS but
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* must not have a valid cap in it.
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*/
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gcsss1(get_gcspr_el0() - 8);
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return 0;
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}
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static int gcs_op_fault_signal(struct tdescr *td, siginfo_t *si,
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ucontext_t *uc)
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{
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ASSERT_GOOD_CONTEXT(uc);
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return 1;
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}
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struct tdescr tde = {
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.name = "Invalid GCS operation",
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.descr = "An invalid GCS operation generates the expected signal",
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.feats_required = FEAT_GCS,
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.timeout = 3,
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.sig_ok = SIGSEGV,
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.sig_ok_code = SEGV_CPERR,
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.sanity_disabled = true,
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.trigger = gcs_op_fault_trigger,
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.run = gcs_op_fault_signal,
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};
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