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14a627fe79
Add both asm-based and C-based tests which have 'may_goto 0' insns.
For the following code in C-based test,
int i, tmp[3];
for (i = 0; i < 3 && can_loop; i++)
tmp[i] = 0;
The clang compiler (clang 19 and 20) generates
may_goto 2
may_goto 1
may_goto 0
r1 = 0
r2 = 0
r3 = 0
The above asm codes are due to llvm pass SROAPass. This ensures the
successful verification since tmp[0-2] are initialized. Otherwise,
the code without SROAPass like
may_goto 5
r1 = 0
may_goto 3
r2 = 0
may_goto 1
r3 = 0
will have verification failure.
Although from the source code C-based test should have verification
failure, clang compiler optimization generates code with successful
verification. If gcc generates different asm codes than clang, the
following code can be used for gcc:
int i, tmp[3];
for (i = 0; i < 3; i++)
tmp[i] = 0;
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
Signed-off-by: Yonghong Song <yonghong.song@linux.dev>
Link: https://lore.kernel.org/r/20250118192034.2124952-1-yonghong.song@linux.dev
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
98 lines
2.2 KiB
C
98 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2025 Meta Platforms, Inc. and affiliates. */
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#include <linux/bpf.h>
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#include <bpf/bpf_helpers.h>
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#include "../../../include/linux/filter.h"
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#include "bpf_misc.h"
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SEC("raw_tp")
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__description("may_goto 0")
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__arch_x86_64
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__xlated("0: r0 = 1")
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__xlated("1: exit")
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__success
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__naked void may_goto_simple(void)
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{
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asm volatile (
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".8byte %[may_goto];"
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"r0 = 1;"
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".8byte %[may_goto];"
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"exit;"
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:
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: __imm_insn(may_goto, BPF_RAW_INSN(BPF_JMP | BPF_JCOND, 0, 0, 0 /* offset */, 0))
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: __clobber_all);
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}
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SEC("raw_tp")
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__description("batch 2 of may_goto 0")
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__arch_x86_64
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__xlated("0: r0 = 1")
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__xlated("1: exit")
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__success
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__naked void may_goto_batch_0(void)
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{
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asm volatile (
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".8byte %[may_goto1];"
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".8byte %[may_goto1];"
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"r0 = 1;"
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".8byte %[may_goto1];"
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".8byte %[may_goto1];"
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"exit;"
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:
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: __imm_insn(may_goto1, BPF_RAW_INSN(BPF_JMP | BPF_JCOND, 0, 0, 0 /* offset */, 0))
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: __clobber_all);
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}
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SEC("raw_tp")
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__description("may_goto batch with offsets 2/1/0")
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__arch_x86_64
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__xlated("0: r0 = 1")
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__xlated("1: exit")
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__success
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__naked void may_goto_batch_1(void)
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{
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asm volatile (
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".8byte %[may_goto1];"
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".8byte %[may_goto2];"
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".8byte %[may_goto3];"
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"r0 = 1;"
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".8byte %[may_goto1];"
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".8byte %[may_goto2];"
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".8byte %[may_goto3];"
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"exit;"
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:
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: __imm_insn(may_goto1, BPF_RAW_INSN(BPF_JMP | BPF_JCOND, 0, 0, 2 /* offset */, 0)),
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__imm_insn(may_goto2, BPF_RAW_INSN(BPF_JMP | BPF_JCOND, 0, 0, 1 /* offset */, 0)),
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__imm_insn(may_goto3, BPF_RAW_INSN(BPF_JMP | BPF_JCOND, 0, 0, 0 /* offset */, 0))
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: __clobber_all);
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}
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SEC("raw_tp")
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__description("may_goto batch with offsets 2/0")
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__arch_x86_64
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__xlated("0: *(u64 *)(r10 -8) = 8388608")
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__xlated("1: r11 = *(u64 *)(r10 -8)")
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__xlated("2: if r11 == 0x0 goto pc+3")
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__xlated("3: r11 -= 1")
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__xlated("4: *(u64 *)(r10 -8) = r11")
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__xlated("5: r0 = 1")
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__xlated("6: r0 = 2")
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__xlated("7: exit")
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__success
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__naked void may_goto_batch_2(void)
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{
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asm volatile (
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".8byte %[may_goto1];"
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".8byte %[may_goto3];"
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"r0 = 1;"
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"r0 = 2;"
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"exit;"
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:
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: __imm_insn(may_goto1, BPF_RAW_INSN(BPF_JMP | BPF_JCOND, 0, 0, 2 /* offset */, 0)),
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__imm_insn(may_goto3, BPF_RAW_INSN(BPF_JMP | BPF_JCOND, 0, 0, 0 /* offset */, 0))
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: __clobber_all);
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}
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char _license[] SEC("license") = "GPL";
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