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7db5572645
The functions related to compression and crypto configurations were previously declared static, restricting the visibility to the defining source file. Remove the static qualifier, allowing it to be used in other files as needed. This is necessary for sharing this configuration functions with other QAT generations. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
277 lines
6.5 KiB
C
277 lines
6.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2023 Intel Corporation */
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#include "adf_accel_devices.h"
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#include "adf_cfg.h"
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#include "adf_cfg_services.h"
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#include "adf_cfg_strings.h"
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#include "adf_common_drv.h"
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#include "adf_gen4_config.h"
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#include "adf_heartbeat.h"
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#include "adf_transport_access_macros.h"
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#include "qat_compression.h"
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#include "qat_crypto.h"
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int adf_crypto_dev_config(struct adf_accel_dev *accel_dev)
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{
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char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
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int banks = GET_MAX_BANKS(accel_dev);
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int cpus = num_online_cpus();
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unsigned long bank, val;
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int instances;
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int ret;
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int i;
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if (adf_hw_dev_has_crypto(accel_dev))
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instances = min(cpus, banks / 2);
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else
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instances = 0;
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for (i = 0; i < instances; i++) {
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val = i;
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bank = i * 2;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_BANK_NUM, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &bank, ADF_DEC);
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if (ret)
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goto err;
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bank += 1;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_BANK_NUM, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &bank, ADF_DEC);
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if (ret)
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goto err;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY,
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i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i);
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val = 128;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 512;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_SIZE, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_TX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_TX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 1;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_RX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 1;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_RX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = ADF_COALESCING_DEF_TIME;
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snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
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ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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}
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val = i;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
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&val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
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&val, ADF_DEC);
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if (ret)
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goto err;
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return 0;
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err:
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dev_err(&GET_DEV(accel_dev), "Failed to add configuration for crypto\n");
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return ret;
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}
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int adf_comp_dev_config(struct adf_accel_dev *accel_dev)
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{
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char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
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int banks = GET_MAX_BANKS(accel_dev);
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int cpus = num_online_cpus();
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unsigned long val;
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int instances;
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int ret;
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int i;
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if (adf_hw_dev_has_compression(accel_dev))
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instances = min(cpus, banks);
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else
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instances = 0;
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for (i = 0; i < instances; i++) {
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val = i;
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snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_BANK_NUM, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 512;
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snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_SIZE, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_TX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 1;
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snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_RX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = ADF_COALESCING_DEF_TIME;
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snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
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ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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}
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val = i;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
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&val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
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&val, ADF_DEC);
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if (ret)
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goto err;
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return 0;
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err:
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dev_err(&GET_DEV(accel_dev), "Failed to add configuration for compression\n");
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return ret;
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}
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int adf_no_dev_config(struct adf_accel_dev *accel_dev)
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{
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unsigned long val;
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int ret;
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val = 0;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
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&val, ADF_DEC);
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if (ret)
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return ret;
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return adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
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&val, ADF_DEC);
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}
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/**
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* adf_gen4_dev_config() - create dev config required to create instances
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*
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* @accel_dev: Pointer to acceleration device.
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*
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* Function creates device configuration required to create instances
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*
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* Return: 0 on success, error code otherwise.
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*/
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int adf_gen4_dev_config(struct adf_accel_dev *accel_dev)
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{
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int ret;
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ret = adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC);
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if (ret)
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goto err;
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ret = adf_cfg_section_add(accel_dev, "Accelerator0");
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if (ret)
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goto err;
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switch (adf_get_service_enabled(accel_dev)) {
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case SVC_SYM_ASYM:
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ret = adf_crypto_dev_config(accel_dev);
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break;
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case SVC_DC:
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case SVC_DCC:
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ret = adf_comp_dev_config(accel_dev);
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break;
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default:
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ret = adf_no_dev_config(accel_dev);
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break;
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}
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if (ret)
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goto err;
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set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
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return ret;
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err:
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dev_err(&GET_DEV(accel_dev), "Failed to configure QAT driver\n");
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return ret;
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}
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EXPORT_SYMBOL_GPL(adf_gen4_dev_config);
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int adf_gen4_cfg_dev_init(struct adf_accel_dev *accel_dev)
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{
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const char *config;
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int ret;
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config = accel_dev->accel_id % 2 ? ADF_CFG_DC : ADF_CFG_CY;
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ret = adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC);
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if (ret)
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return ret;
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/* Default configuration is crypto only for even devices
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* and compression for odd devices
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*/
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_GENERAL_SEC,
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ADF_SERVICES_ENABLED, config,
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ADF_STR);
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if (ret)
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return ret;
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adf_heartbeat_save_cfg_param(accel_dev, ADF_CFG_HB_TIMER_MIN_MS);
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return 0;
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}
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EXPORT_SYMBOL_GPL(adf_gen4_cfg_dev_init);
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