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879a4f78ea
Add support for the ZSTD algorithm for QAT GEN4, GEN5 and GEN6 via the acomp API. For GEN4 and GEN5, compression is performed in hardware using LZ4s, a QAT-specific variant of LZ4. The compressed output is post-processed to generate ZSTD sequences, and the ZSTD library is then used to produce the final ZSTD stream via zstd_compress_sequences_and_literals(). Only inputs between 8 KB and 512 KB are offloaded to the device. The minimum size restriction will be relaxed once polling support is added. The maximum size is limited by the use of pre-allocated per-CPU scratch buffers. On these generations, only compression is offloaded to hardware; decompression always falls back to software. For GEN6, both compression and decompression are offloaded to the accelerator, which natively supports the ZSTD algorithm. There is no limit on the input buffer size supported. However, since GEN6 is limited to a history size of 64 KB, decompression of frames compressed with a larger history falls back to software. Since GEN2 devices do not support ZSTD or LZ4s, add a mechanism that prevents selecting GEN2 compression instances for ZSTD or LZ4s when a GEN2 plug-in card is present on a system with an embedded GEN4, GEN5 or GEN6 device. In addition, modify the algorithm registration logic to allow registering the correct implementation, i.e. LZ4s based for GEN4 and GEN5 or native ZSTD for GEN6. Co-developed-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Laurent M Coquerel <laurent.m.coquerel@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
123 lines
3.1 KiB
C
123 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright(c) 2022 Intel Corporation */
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#ifndef _QAT_COMP_REQ_H_
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#define _QAT_COMP_REQ_H_
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#include "icp_qat_fw_comp.h"
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#define QAT_COMP_REQ_SIZE (sizeof(struct icp_qat_fw_comp_req))
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#define QAT_COMP_CTX_SIZE (QAT_COMP_REQ_SIZE * 2)
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static inline void qat_comp_create_req(void *ctx, void *req, u64 src, u32 slen,
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u64 dst, u32 dlen, u64 opaque)
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{
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struct icp_qat_fw_comp_req *fw_tmpl = ctx;
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struct icp_qat_fw_comp_req *fw_req = req;
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struct icp_qat_fw_comp_req_params *req_pars = &fw_req->comp_pars;
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memcpy(fw_req, fw_tmpl, sizeof(*fw_req));
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fw_req->comn_mid.src_data_addr = src;
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fw_req->comn_mid.src_length = slen;
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fw_req->comn_mid.dest_data_addr = dst;
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fw_req->comn_mid.dst_length = dlen;
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fw_req->comn_mid.opaque_data = opaque;
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req_pars->comp_len = slen;
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req_pars->out_buffer_sz = dlen;
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fw_req->u3.asb_threshold.asb_value *= slen >> 4;
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}
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static inline void qat_comp_create_compression_req(void *ctx, void *req,
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u64 src, u32 slen,
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u64 dst, u32 dlen,
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u64 opaque)
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{
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qat_comp_create_req(ctx, req, src, slen, dst, dlen, opaque);
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}
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static inline void qat_comp_create_decompression_req(void *ctx, void *req,
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u64 src, u32 slen,
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u64 dst, u32 dlen,
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u64 opaque)
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{
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struct icp_qat_fw_comp_req *fw_tmpl = ctx;
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fw_tmpl++;
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qat_comp_create_req(fw_tmpl, req, src, slen, dst, dlen, opaque);
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}
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static inline u32 qat_comp_get_consumed_ctr(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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return qat_resp->comp_resp_pars.input_byte_counter;
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}
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static inline u32 qat_comp_get_produced_ctr(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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return qat_resp->comp_resp_pars.output_byte_counter;
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}
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static inline u32 qat_comp_get_produced_adler32(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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return qat_resp->comp_resp_pars.crc.legacy.curr_adler_32;
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}
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static inline u64 qat_comp_get_opaque(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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return qat_resp->opaque_data;
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}
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static inline s8 qat_comp_get_cmp_err(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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return qat_resp->comn_resp.comn_error.cmp_err_code;
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}
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static inline s8 qat_comp_get_xlt_err(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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return qat_resp->comn_resp.comn_error.xlat_err_code;
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}
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static inline s8 qat_comp_get_cmp_status(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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u8 stat_filed = qat_resp->comn_resp.comn_status;
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return ICP_QAT_FW_COMN_RESP_CMP_STAT_GET(stat_filed);
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}
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static inline s8 qat_comp_get_xlt_status(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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u8 stat_filed = qat_resp->comn_resp.comn_status;
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return ICP_QAT_FW_COMN_RESP_XLAT_STAT_GET(stat_filed);
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}
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static inline u8 qat_comp_get_cmp_cnv_flag(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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u8 flags = qat_resp->comn_resp.hdr_flags;
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return ICP_QAT_FW_COMN_HDR_CNV_FLAG_GET(flags);
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}
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static inline u8 qat_comp_get_cmp_uncomp_flag(void *resp)
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{
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struct icp_qat_fw_comp_resp *qat_resp = resp;
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u8 flags = qat_resp->comn_resp.hdr_flags;
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return ICP_QAT_FW_COMN_HDR_ST_BLK_FLAG_GET(flags);
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}
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#endif
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