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Assert and deassert functionality of the DSP found on i.MX8MP is realized by combining control bits from two modules: Audio Block Control and Debug Access Port. Audio block control bits are used to Run/Stall the DSP core while the DAP bits are used for software reset the core. The original plan was to use fsl,dsp-ctrl property and to refer the audiomix bits via syscon interface. This proposal received NACK from community we shouldn't abuse the syscon interface [1]. So remove fsl,dsp-ctrl property for i.MX8MP and use reset control interface instead. Example dts node only uses runstall control now, but softreset will be added in the future when we will convert the softreset functionality to use reset controller API. [1] https://patchwork.kernel.org/project/imx/patch/20250212085222.107102-6-daniel.baluta@nxp.com/ Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20250311085812.1296243-3-daniel.baluta@nxp.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
247 lines
5.9 KiB
YAML
247 lines
5.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8 DSP core
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maintainers:
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- Daniel Baluta <daniel.baluta@nxp.com>
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- Shengjiu Wang <shengjiu.wang@nxp.com>
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description: |
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Some boards from i.MX8 family contain a DSP core used for
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advanced pre- and post- audio processing.
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properties:
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compatible:
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enum:
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- fsl,imx8qxp-dsp
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- fsl,imx8qm-dsp
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- fsl,imx8mp-dsp
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- fsl,imx8ulp-dsp
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- fsl,imx8qxp-hifi4
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- fsl,imx8qm-hifi4
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- fsl,imx8mp-hifi4
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- fsl,imx8ulp-hifi4
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reg:
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maxItems: 1
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clocks:
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items:
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- description: ipg clock
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- description: ocram clock
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- description: core clock
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- description: debug interface clock
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- description: message unit clock
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minItems: 3
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clock-names:
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items:
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- const: ipg
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- const: ocram
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- const: core
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- const: debug
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- const: mu
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minItems: 3
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power-domains:
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description:
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List of phandle and PM domain specifier as documented in
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Documentation/devicetree/bindings/power/power_domain.txt
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minItems: 1
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maxItems: 4
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mboxes:
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description:
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List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
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or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB
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(see mailbox/fsl,mu.txt)
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minItems: 3
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maxItems: 4
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mbox-names:
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minItems: 3
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maxItems: 4
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memory-region:
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description:
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phandle to a node describing reserved memory (System RAM memory)
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used by DSP (see bindings/reserved-memory/reserved-memory.txt)
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minItems: 1
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maxItems: 4
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firmware-name:
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description: |
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Default name of the firmware to load to the remote processor.
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fsl,dsp-ctrl:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to syscon block which provide access for processor enablement
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resets:
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minItems: 1
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reset-names:
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minItems: 1
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items:
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- const: runstall
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- const: softreset
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- power-domains
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- mboxes
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- mbox-names
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- memory-region
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx8qxp-dsp
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- fsl,imx8qxp-hifi4
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then:
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properties:
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power-domains:
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minItems: 2
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maxItems: 2
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx8qm-dsp
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- fsl,imx8qm-hifi4
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then:
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properties:
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power-domains:
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minItems: 4
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx8mp-dsp
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- fsl,imx8mp-hifi4
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- fsl,imx8ulp-dsp
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- fsl,imx8ulp-hifi4
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then:
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properties:
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power-domains:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx8qxp-hifi4
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- fsl,imx8qm-hifi4
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- fsl,imx8mp-hifi4
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- fsl,imx8ulp-hifi4
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then:
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properties:
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memory-region:
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minItems: 4
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mboxes:
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maxItems: 3
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mbox-names:
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items:
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- const: tx
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- const: rx
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- const: rxdb
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else:
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properties:
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memory-region:
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maxItems: 1
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mboxes:
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minItems: 4
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mbox-names:
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items:
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- const: txdb0
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- const: txdb1
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- const: rxdb0
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- const: rxdb1
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx8mp-dsp
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- fsl,imx8mp-hifi4
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then:
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required:
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- resets
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- reset-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/firmware/imx/rsrc.h>
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#include <dt-bindings/clock/imx8-clock.h>
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dsp@596e8000 {
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compatible = "fsl,imx8qxp-dsp";
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reg = <0x596e8000 0x88000>;
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clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
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<&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
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<&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
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clock-names = "ipg", "ocram", "core";
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power-domains = <&pd IMX_SC_R_MU_13B>,
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<&pd IMX_SC_R_MU_2A>;
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mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
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mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
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memory-region = <&dsp_reserved>;
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};
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- |
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include <dt-bindings/reset/imx8mp-reset-audiomix.h>
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dsp_reserved: dsp@92400000 {
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reg = <0x92400000 0x1000000>;
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no-map;
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};
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dsp_vdev0vring0: vdev0vring0@942f0000 {
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reg = <0x942f0000 0x8000>;
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no-map;
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};
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dsp_vdev0vring1: vdev0vring1@942f8000 {
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reg = <0x942f8000 0x8000>;
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no-map;
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};
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dsp_vdev0buffer: vdev0buffer@94300000 {
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compatible = "shared-dma-pool";
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reg = <0x94300000 0x100000>;
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no-map;
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};
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dsp: dsp@3b6e8000 {
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compatible = "fsl,imx8mp-hifi4";
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reg = <0x3b6e8000 0x88000>;
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clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
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<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>,
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<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
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<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>;
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clock-names = "ipg", "ocram", "core", "debug";
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firmware-name = "imx/dsp/hifi4.bin";
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power-domains = <&audiomix_pd>;
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mbox-names = "tx", "rx", "rxdb";
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mboxes = <&mu2 0 0>,
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<&mu2 1 0>,
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<&mu2 3 0>;
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memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
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<&dsp_vdev0vring1>, <&dsp_reserved>;
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resets = <&audio_blk_ctrl IMX8MP_AUDIOMIX_DSP_RUNSTALL>;
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reset-names = "runstall";
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};
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