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043e4e514c
Add a new compatible and related bindigns for the fpga-based "ad3552r" AXI IP core, a variant of the generic AXI DAC IP. The AXI "ad3552r" IP is a very similar HDL (fpga) variant of the generic AXI "DAC" IP, intended to control ad3552r and similar chips, mainly to reach high speed transfer rates using a QSPI DDR (dobule-data-rate) interface. The ad3552r device is defined as a child of the AXI DAC, that in this case is acting as an SPI controller. Note, #io-backend is present because it is possible (in theory anyway) to use a separate controller for the control path than that used for the datapath. Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20241028-wip-bl-ad3552r-axi-v0-iio-testing-v9-2-f6960b4f9719@kernel-space.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
126 lines
2.7 KiB
YAML
126 lines
2.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/dac/adi,axi-dac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices AXI DAC IP core
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maintainers:
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- Nuno Sa <nuno.sa@analog.com>
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description: |
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Analog Devices Generic AXI DAC IP core for interfacing a DAC device
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with a high speed serial (JESD204B/C) or source synchronous parallel
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interface (LVDS/CMOS).
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Usually, some other interface type (i.e SPI) is used as a control
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interface for the actual DAC, while this IP core will interface
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to the data-lines of the DAC and handle the streaming of data from
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memory via DMA into the DAC.
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https://wiki.analog.com/resources/fpga/docs/axi_dac_ip
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https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html
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properties:
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compatible:
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enum:
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- adi,axi-dac-9.1.b
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- adi,axi-ad3552r
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reg:
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maxItems: 1
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dmas:
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maxItems: 1
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dma-names:
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items:
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- const: tx
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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items:
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- const: s_axi_aclk
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- const: dac_clk
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minItems: 1
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'#io-backend-cells':
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const: 0
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required:
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- compatible
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- dmas
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- reg
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- clocks
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: adi,axi-ad3552r
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then:
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$ref: /schemas/spi/spi-controller.yaml#
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properties:
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clocks:
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minItems: 2
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clock-names:
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minItems: 2
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required:
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- clock-names
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else:
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properties:
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clocks:
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maxItems: 1
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clock-names:
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maxItems: 1
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unevaluatedProperties: false
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examples:
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- |
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dac@44a00000 {
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compatible = "adi,axi-dac-9.1.b";
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reg = <0x44a00000 0x10000>;
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dmas = <&tx_dma 0>;
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dma-names = "tx";
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#io-backend-cells = <0>;
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clocks = <&clkc 15>;
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clock-names = "s_axi_aclk";
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};
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- |
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#include <dt-bindings/gpio/gpio.h>
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axi_dac: spi@44a70000 {
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compatible = "adi,axi-ad3552r";
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reg = <0x44a70000 0x1000>;
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dmas = <&dac_tx_dma 0>;
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dma-names = "tx";
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#io-backend-cells = <0>;
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clocks = <&clkc 15>, <&ref_clk>;
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clock-names = "s_axi_aclk", "dac_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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dac@0 {
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compatible = "adi,ad3552r";
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reg = <0>;
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reset-gpios = <&gpio0 92 GPIO_ACTIVE_HIGH>;
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io-backends = <&axi_dac>;
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spi-max-frequency = <20000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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reg = <0>;
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adi,output-range-microvolt = <(-10000000) (10000000)>;
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};
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};
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};
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...
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