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The clock tree of K1 SoC contains three main types of clock hardware (PLL/DDN/MIX) and has control registers split into several multifunction devices: APBS (PLLs), MPMU, APBC and APMU. All register operations are done through regmap to ensure atomicity between concurrent operations of clock driver and reset, power-domain driver that will be introduced in the future. Signed-off-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250416135406.16284-4-heylenay@4d2.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
19 lines
433 B
Plaintext
19 lines
433 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config SPACEMIT_CCU
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tristate "Clock support for SpacemiT SoCs"
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depends on ARCH_SPACEMIT || COMPILE_TEST
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select MFD_SYSCON
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help
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Say Y to enable clock controller unit support for SpacemiT SoCs.
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if SPACEMIT_CCU
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config SPACEMIT_K1_CCU
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tristate "Support for SpacemiT K1 SoC"
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depends on ARCH_SPACEMIT || COMPILE_TEST
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help
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Support for clock controller unit in SpacemiT K1 SoC.
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endif
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