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1498a5a799
Two different compatibles for SC7280 CPU BWMON instance were used
in DTS and bindings. Correct the bindings to use the same one as in
DTS, because it is more specific.
Fixes: b7c84ae757 ("dt-bindings: interconnect: qcom,msm8998-bwmon: Add support for sc7280 BWMONs")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221011140744.29829-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
91 lines
2.4 KiB
YAML
91 lines
2.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Interconnect Bandwidth Monitor
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maintainers:
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- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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description: |
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Bandwidth Monitor measures current throughput on buses between various NoC
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fabrics and provides information when it crosses configured thresholds.
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Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
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- Measuring the bandwidth between CPUs and Last Level Cache Controller -
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called just BWMON,
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- Measuring the bandwidth between Last Level Cache Controller and memory
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(DDR) - called LLCC BWMON.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- qcom,sc7280-cpu-bwmon
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- qcom,sdm845-bwmon
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- const: qcom,msm8998-bwmon
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- const: qcom,msm8998-bwmon # BWMON v4
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- const: qcom,sc7280-llcc-bwmon # BWMON v5
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- const: qcom,sdm845-llcc-bwmon # BWMON v5
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interconnects:
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maxItems: 1
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interrupts:
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maxItems: 1
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operating-points-v2: true
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opp-table:
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type: object
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reg:
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# BWMON v4 (currently described) and BWMON v5 use one register address
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# space. BWMON v2 uses two register spaces - not yet described.
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maxItems: 1
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required:
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- compatible
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- interconnects
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- interrupts
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- operating-points-v2
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- opp-table
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- reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interconnect/qcom,sdm845.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pmu@1436400 {
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compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon";
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reg = <0x01436400 0x600>;
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interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
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interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
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operating-points-v2 = <&cpu_bwmon_opp_table>;
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cpu_bwmon_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-0 {
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opp-peak-kBps = <4800000>;
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};
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opp-1 {
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opp-peak-kBps = <9216000>;
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};
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opp-2 {
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opp-peak-kBps = <15052800>;
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};
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opp-3 {
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opp-peak-kBps = <20889600>;
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};
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opp-4 {
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opp-peak-kBps = <25497600>;
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};
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};
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};
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