linux

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Dillon Varone 6cb5cec16c drm/amd/display: Set memclk levels to be at least 1 for dcn32

[Why]
Cannot report 0 memclk levels even when SMU does not provide any.

[How]
When memclk levels reported by SMU is 0, set levels to 1.

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.0.x

2022-11-02 16:50:16 -04:00

dalsmc.h

drm/amd/display: add CLKMGR changes for DCN32/321

2022-06-03 16:43:37 -04:00

dcn32_clk_mgr_smu_msg.c

drm/amd/display: Add SubVP required code

2022-07-05 16:10:38 -04:00

dcn32_clk_mgr_smu_msg.h

drm/amd/display: Implement a pme workaround function

2022-06-21 18:17:24 -04:00

dcn32_clk_mgr.c

drm/amd/display: Set memclk levels to be at least 1 for dcn32