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Generally at most 1 blank line is the standard style for DT schema files. Remove the few cases with more than 1 so that the yamllint check for this can be enabled. Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc Acked-by: Georgi Djakov <djakov@kernel.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Andi Shyti <andi.shyti@kernel.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
122 lines
3.7 KiB
YAML
122 lines
3.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: i.MX8QXP/QM JPEG decoder/encoder
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maintainers:
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- Mirela Rabulea <mirela.rabulea@nxp.com>
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description: |-
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The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs is an
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ISO/IEC 10918-1 JPEG standard compliant decoder/encoder, for Baseline
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and Extended Sequential DCT modes.
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properties:
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compatible:
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oneOf:
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- items:
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enum:
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- nxp,imx8qxp-jpgdec
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- nxp,imx8qxp-jpgenc
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- items:
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- enum:
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- nxp,imx8qm-jpgdec
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- nxp,imx95-jpgdec
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- const: nxp,imx8qxp-jpgdec
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- items:
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- enum:
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- nxp,imx8qm-jpgenc
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- nxp,imx95-jpgenc
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- const: nxp,imx8qxp-jpgenc
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reg:
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maxItems: 1
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clocks:
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items:
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- description: AXI DMA engine clock for fetching JPEG bitstream from memory (per)
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- description: IP bus clock for register access (ipg)
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interrupts:
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description: |
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There are 4 slots available in the IP, which the driver may use
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If a certain slot is used, it should have an associated interrupt
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The interrupt with index i is assumed to be for slot i
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minItems: 1 # At least one slot is needed by the driver
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maxItems: 4 # The IP has 4 slots available for use
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power-domains:
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description:
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List of phandle and PM domain specifier as documented in
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Documentation/devicetree/bindings/power/power_domain.txt
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minItems: 1 # Wrapper and all slots
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maxItems: 5 # Wrapper and 4 slots
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required:
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- compatible
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- reg
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- clocks
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- interrupts
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- power-domains
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- nxp,imx95-jpgenc
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- nxp,imx95-jpgdec
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then:
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properties:
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power-domains:
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maxItems: 1
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else:
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properties:
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power-domains:
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minItems: 2 # Wrapper and 1 slot
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8-lpcg.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/firmware/imx/rsrc.h>
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jpegdec: jpegdec@58400000 {
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compatible = "nxp,imx8qxp-jpgdec";
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reg = <0x58400000 0x00050000 >;
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clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
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<&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
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interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
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<&pd IMX_SC_R_MJPEG_DEC_S0>,
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<&pd IMX_SC_R_MJPEG_DEC_S1>,
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<&pd IMX_SC_R_MJPEG_DEC_S2>,
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<&pd IMX_SC_R_MJPEG_DEC_S3>;
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};
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jpegenc: jpegenc@58450000 {
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compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc";
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reg = <0x58450000 0x00050000 >;
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clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
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<&img_jpeg__lpcg IMX_LPCG_CLK_4>;
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interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
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<&pd IMX_SC_R_MJPEG_ENC_S0>,
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<&pd IMX_SC_R_MJPEG_ENC_S1>,
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<&pd IMX_SC_R_MJPEG_ENC_S2>,
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<&pd IMX_SC_R_MJPEG_ENC_S3>;
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};
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...
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