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Generally at most 1 blank line is the standard style for DT schema files. Remove the few cases with more than 1 so that the yamllint check for this can be enabled. Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc Acked-by: Georgi Djakov <djakov@kernel.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Andi Shyti <andi.shyti@kernel.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
63 lines
1.3 KiB
YAML
63 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/loongson.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Loongson PCI Host Controller
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maintainers:
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- Jiaxun Yang <jiaxun.yang@flygoat.com>
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description: |+
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PCI host controller found on Loongson PCHs and SoCs.
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allOf:
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- $ref: /schemas/pci/pci-host-bridge.yaml#
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properties:
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compatible:
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enum:
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- loongson,ls2k-pci
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- loongson,ls7a-pci
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- loongson,rs780e-pci
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reg:
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minItems: 1
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items:
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- description: CFG0 standard config space register
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- description: CFG1 extended config space register
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ranges:
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minItems: 1
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maxItems: 3
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required:
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- compatible
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- reg
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- ranges
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unevaluatedProperties: false
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examples:
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- |
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie@1a000000 {
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compatible = "loongson,rs780e-pci";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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// CPU_PHYSICAL(2) SIZE(2)
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reg = <0x0 0x1a000000 0x0 0x2000000>;
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// BUS_ADDRESS(3) CPU_PHYSICAL(2) SIZE(2)
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ranges = <0x01000000 0x0 0x00004000 0x0 0x00004000 0x0 0x00004000>,
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<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
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};
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};
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...
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