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Move several embedded controller bindings (like ChromeOS EC, Gateworks System Controller and Kontron sl28cpld Board Management) to new subdirectory "embedded-controller" matching their purpose. An embedded controller (EC) is a discrete component that contains a microcontroller (i.e. a small CPU running a small firmware without operating system) mounted into a larger computer system running a fully fledged operating system that needs to utilize the embedded controller as part of its operation. So far the EC bindings were split between "mfd" and "platform" directory. MFD name comes from Linux, not hardware, and "platform" is a bit too generic. Rename Gateworks GSC and Huawei Gaokun filenames to match compatible, as preferred for bindings. Acked-by: Michael Walle <mwalle@kernel.org> # for sl28cpld Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Mark Brown <broonie@kernel.org> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250825081201.9775-2-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones <lee@kernel.org>
263 lines
6.2 KiB
YAML
263 lines
6.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/remoteproc/mtk,scp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek SCP
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maintainers:
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- Tinghan Shen <tinghan.shen@mediatek.com>
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description:
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This binding provides support for ARM Cortex M4 Co-processor found on some
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Mediatek SoCs.
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properties:
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compatible:
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enum:
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- mediatek,mt8183-scp
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- mediatek,mt8186-scp
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- mediatek,mt8188-scp
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- mediatek,mt8188-scp-dual
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- mediatek,mt8192-scp
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- mediatek,mt8195-scp
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- mediatek,mt8195-scp-dual
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reg:
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description:
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Should contain the address ranges for memory regions SRAM, CFG, and,
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on some platforms, L1TCM.
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minItems: 2
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maxItems: 3
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reg-names:
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minItems: 2
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maxItems: 3
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clocks:
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description:
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Clock for co-processor (see ../clock/clock-bindings.txt).
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Required by mt8183 and mt8192.
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maxItems: 1
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clock-names:
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const: main
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interrupts:
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maxItems: 1
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firmware-name:
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maxItems: 1
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description:
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If present, name (or relative path) of the file within the
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firmware search path containing the firmware image used when
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initializing SCP.
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memory-region:
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maxItems: 1
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cros-ec-rpmsg:
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$ref: /schemas/embedded-controller/google,cros-ec.yaml
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description:
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This subnode represents the rpmsg device. The properties
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of this node are defined by the individual bindings for
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the rpmsg devices.
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required:
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- mediatek,rpmsg-name
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unevaluatedProperties: false
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'#address-cells':
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const: 1
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'#size-cells':
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const: 1
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ranges:
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description:
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Standard ranges definition providing address translations for
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local SCP SRAM address spaces to bus addresses.
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patternProperties:
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"^scp@[a-f0-9]+$":
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type: object
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description:
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The MediaTek SCP integrated to SoC might be a multi-core version.
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The other cores are represented as child nodes of the boot core.
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There are some integration differences for the IP like the usage of
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address translator for translating SoC bus addresses into address space
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for the processor.
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Each SCP core has own cache memory. The SRAM and L1TCM are shared by
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cores. The power of cache, SRAM and L1TCM power should be enabled
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before booting SCP cores. The size of cache, SRAM, and L1TCM are varied
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on different SoCs.
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The SCP cores do not use an MMU, but has a set of registers to
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control the translations between 32-bit CPU addresses into system bus
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addresses. Cache and memory access settings are provided through a
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Memory Protection Unit (MPU), programmable only from the SCP.
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properties:
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compatible:
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enum:
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- mediatek,scp-core
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reg:
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description: The base address and size of SRAM.
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maxItems: 1
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reg-names:
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const: sram
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interrupts:
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maxItems: 1
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firmware-name:
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maxItems: 1
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description:
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If present, name (or relative path) of the file within the
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firmware search path containing the firmware image used when
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initializing sub cores of multi-core SCP.
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memory-region:
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maxItems: 1
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cros-ec-rpmsg:
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$ref: /schemas/embedded-controller/google,cros-ec.yaml
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description:
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This subnode represents the rpmsg device. The properties
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of this node are defined by the individual bindings for
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the rpmsg devices.
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required:
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- mediatek,rpmsg-name
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- reg-names
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additionalProperties: false
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required:
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- compatible
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- reg
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- reg-names
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allOf:
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- if:
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properties:
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compatible:
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enum:
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- mediatek,mt8183-scp
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- mediatek,mt8192-scp
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then:
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required:
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- clocks
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- clock-names
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- if:
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properties:
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compatible:
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enum:
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- mediatek,mt8183-scp
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- mediatek,mt8186-scp
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- mediatek,mt8188-scp
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then:
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properties:
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: sram
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- const: cfg
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- if:
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properties:
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compatible:
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enum:
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- mediatek,mt8192-scp
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- mediatek,mt8195-scp
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then:
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properties:
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reg:
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maxItems: 3
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reg-names:
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items:
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- const: sram
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- const: cfg
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- const: l1tcm
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- if:
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properties:
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compatible:
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enum:
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- mediatek,mt8188-scp-dual
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- mediatek,mt8195-scp-dual
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then:
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properties:
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: cfg
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- const: l1tcm
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8192-clk.h>
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scp@10500000 {
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compatible = "mediatek,mt8192-scp";
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reg = <0x10500000 0x80000>,
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<0x10700000 0x8000>,
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<0x10720000 0xe0000>;
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reg-names = "sram", "cfg", "l1tcm";
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clocks = <&infracfg CLK_INFRA_SCPSYS>;
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clock-names = "main";
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cros-ec-rpmsg {
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compatible = "google,cros-ec-rpmsg";
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mediatek,rpmsg-name = "cros-ec-rpmsg";
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};
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};
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- |
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scp@10500000 {
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compatible = "mediatek,mt8195-scp-dual";
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reg = <0x10720000 0xe0000>,
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<0x10700000 0x8000>;
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reg-names = "cfg", "l1tcm";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x10500000 0x100000>;
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scp@0 {
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compatible = "mediatek,scp-core";
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reg = <0x0 0xa0000>;
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reg-names = "sram";
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cros-ec-rpmsg {
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compatible = "google,cros-ec-rpmsg";
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mediatek,rpmsg-name = "cros-ec-rpmsg";
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};
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};
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scp@a0000 {
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compatible = "mediatek,scp-core";
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reg = <0xa0000 0x20000>;
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reg-names = "sram";
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cros-ec-rpmsg {
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compatible = "google,cros-ec-rpmsg";
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mediatek,rpmsg-name = "cros-ec-rpmsg";
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};
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};
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};
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