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1d562ba0aa
Convert the Nuvoton NPCM PSPI binding to DT schema format. Also update the binding to fix shortcoming: * Drop clock-frequency property: it is never read in the NPCM PSPI driver and has no effect. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251112150950.1680154-1-tmaimon77@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
73 lines
1.6 KiB
YAML
73 lines
1.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/nuvoton,npcm-pspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton NPCM Peripheral SPI (PSPI) Controller
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maintainers:
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- Tomer Maimon <tmaimon77@gmail.com>
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allOf:
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- $ref: spi-controller.yaml#
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description:
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Nuvoton NPCM Peripheral Serial Peripheral Interface (PSPI) controller.
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Nuvoton NPCM7xx SOC supports two PSPI channels.
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Nuvoton NPCM8xx SOC support one PSPI channel.
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properties:
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compatible:
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enum:
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- nuvoton,npcm750-pspi # Poleg NPCM7XX
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- nuvoton,npcm845-pspi # Arbel NPCM8XX
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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description: PSPI reference clock.
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clock-names:
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items:
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- const: clk_apb5
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
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#include "dt-bindings/gpio/gpio.h"
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spi0: spi@f0200000 {
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compatible = "nuvoton,npcm750-pspi";
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reg = <0xf0200000 0x1000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pspi1_pins>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk NPCM7XX_CLK_APB5>;
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clock-names = "clk_apb5";
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resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
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cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
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};
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