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91945660ac
Add optional "limit-hs-gear" and "limit-rate" properties to the UFS controller common binding. These properties allow limiting the maximum HS gear and rate. This is useful in cases where the customer board may have signal integrity, clock configuration or layout issues that prevent reliable operation at higher gears. Such limitations are especially critical in those platforms, where stability is prioritized over peak performance. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
130 lines
3.3 KiB
YAML
130 lines
3.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ufs/ufs-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Common properties for Universal Flash Storage (UFS) Host Controllers
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maintainers:
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- Alim Akhtar <alim.akhtar@samsung.com>
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- Avri Altman <avri.altman@wdc.com>
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properties:
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clocks: true
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clock-names: true
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freq-table-hz:
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items:
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items:
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- description: Minimum frequency for given clock in Hz
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- description: Maximum frequency for given clock in Hz
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deprecated: true
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description: |
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Preferred is operating-points-v2.
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Array of <min max> operating frequencies in Hz stored in the same order
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as the clocks property. If either this property or operating-points-v2 is
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not defined or a value in the array is "0" then it is assumed that the
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frequency is set by the parent clock or a fixed rate clock source.
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operating-points-v2:
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description:
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Preferred over freq-table-hz.
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If present, each OPP must contain array of frequencies stored in the same
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order for each clock. If clock frequency in the array is "0" then it is
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assumed that the frequency is set by the parent clock or a fixed rate
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clock source.
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opp-table:
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type: object
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interrupts:
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maxItems: 1
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lanes-per-direction:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [1, 2]
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default: 2
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description:
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Number of lanes available per direction. Note that it is assume same
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number of lanes is used both directions at once.
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vdd-hba-supply:
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description:
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Phandle to UFS host controller supply regulator node.
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vcc-supply:
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description:
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Phandle to VCC supply regulator node.
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vccq-supply:
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description:
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Phandle to VCCQ supply regulator node.
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vccq2-supply:
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description:
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Phandle to VCCQ2 supply regulator node.
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vcc-supply-1p8:
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type: boolean
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description:
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For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V. This
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boolean property when set, specifies to use low voltage range of
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1.7-1.95V. Note for external UFS cards this property is invalid and valid
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VCC range is always 2.7-3.6V.
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vcc-max-microamp:
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description:
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Specifies max. load that can be drawn from VCC supply.
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vccq-max-microamp:
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description:
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Specifies max. load that can be drawn from VCCQ supply.
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vccq2-max-microamp:
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description:
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Specifies max. load that can be drawn from VCCQ2 supply.
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msi-parent: true
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limit-hs-gear:
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 6
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default: 6
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description:
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Restricts the maximum HS gear used in both TX and RX directions.
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limit-gear-rate:
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$ref: /schemas/types.yaml#/definitions/string
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enum: [rate-a, rate-b]
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default: rate-b
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description:
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Restricts the UFS controller to rate-a or rate-b for both TX and
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RX directions.
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dependencies:
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freq-table-hz: [ clocks ]
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operating-points-v2: [ clocks, clock-names ]
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required:
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- interrupts
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allOf:
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- if:
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required:
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- freq-table-hz
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then:
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properties:
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operating-points-v2: false
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- if:
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required:
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- operating-points-v2
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then:
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properties:
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freq-table-hz: false
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additionalProperties: true
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