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There is a hw restriction that we could enable the FBC for FP16 formats only if the pixel normalization block is enabled. Hence enable the pixel normalizer block with normalzation factor as 1.0 for the supported FP16 formats to get the FBC enabled. Two existing helper function definitions are moved up to avoid the forward declarations as part of this patch as well. v2: sw/hw state differentiation on handling pixel normalizer (Jani) Bspec: 69863, 68881 Cc: Shekhar Chauhan <shekhar.chauhan@intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patch.msgid.link/20251027134001.325064-5-vinod.govindapillai@intel.com
60 lines
1.9 KiB
C
60 lines
1.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_FBC_H__
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#define __INTEL_FBC_H__
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#include <linux/types.h>
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enum fb_op_origin;
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struct intel_atomic_state;
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struct intel_crtc;
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struct intel_crtc_state;
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struct intel_display;
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struct intel_dsb;
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struct intel_fbc;
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struct intel_plane;
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struct intel_plane_state;
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enum intel_fbc_id {
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INTEL_FBC_A,
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INTEL_FBC_B,
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INTEL_FBC_C,
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INTEL_FBC_D,
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I915_MAX_FBCS,
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};
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int intel_fbc_atomic_check(struct intel_atomic_state *state);
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int intel_fbc_min_cdclk(const struct intel_crtc_state *crtc_state);
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bool intel_fbc_pre_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_fbc_post_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_fbc_init(struct intel_display *display);
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void intel_fbc_cleanup(struct intel_display *display);
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void intel_fbc_sanitize(struct intel_display *display);
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void intel_fbc_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_fbc_disable(struct intel_crtc *crtc);
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void intel_fbc_invalidate(struct intel_display *display,
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unsigned int frontbuffer_bits,
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enum fb_op_origin origin);
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void intel_fbc_flush(struct intel_display *display,
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unsigned int frontbuffer_bits, enum fb_op_origin origin);
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void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
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void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);
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void intel_fbc_reset_underrun(struct intel_display *display);
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void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
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void intel_fbc_debugfs_register(struct intel_display *display);
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void intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,
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struct intel_plane *plane);
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bool
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intel_fbc_is_enable_pixel_normalizer(const struct intel_plane_state *plane_state);
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#endif /* __INTEL_FBC_H__ */
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