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Implement the HDMI Algorithm to dynamically create LT PHY state based on the port clock provided. Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patch.msgid.link/20251110061940.545183-1-suraj.kandpal@intel.com
48 lines
1.7 KiB
C
48 lines
1.7 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Copyright © 2025 Intel Corporation
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*/
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#ifndef __INTEL_LT_PHY_H__
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#define __INTEL_LT_PHY_H__
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#include <linux/types.h>
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struct intel_atomic_state;
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struct intel_display;
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struct intel_encoder;
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struct intel_crtc_state;
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struct intel_crtc;
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struct intel_lt_phy_pll_state;
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void intel_lt_phy_pll_enable(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_lt_phy_pll_disable(struct intel_encoder *encoder);
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int
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intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder);
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int intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_lt_phy_dump_hw_state(struct intel_display *display,
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const struct intel_lt_phy_pll_state *hw_state);
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bool
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intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a,
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const struct intel_lt_phy_pll_state *b);
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void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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struct intel_lt_phy_pll_state *pll_state);
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void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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int
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intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state,
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u32 frequency_khz);
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void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);
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#define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35)
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#endif /* __INTEL_LT_PHY_H__ */
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