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9b286c3b0b
Starting with Xe3p_LPD, we now have a new field in MEM_SS_INFO_GLOBAL
that indicates whether the memory has enabled ECC that limits display
bandwidth. Add the field ecc_impacting_de_bw to struct dram_info to
contain that information and set it appropriately when probing for
memory info.
Currently there are no instructions in Bspec on how to handle that case,
so let's throw a warning if we ever find such a scenario.
v2:
- s/ecc_impacting_de/ecc_impacting_de_bw/ to be more specific. (Matt
Atwood)
- Add warning if ecc_impacting_de_bw is true, since we currently do
not have instructions on how to handle it. (Matt Roper)
v3:
- Check on ecc_impacting_de_bw for the warning only for Xe3p_LPD and
beyond.
- Change warning macro from drm_WARN_ON_ONCE() to drm_WARN_ON().
Bspec: 69131
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20251103-xe3p_lpd-basic-enabling-v3-15-00e87b510ae7@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2020 Intel Corporation
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*/
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#ifndef __INTEL_DRAM_H__
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#define __INTEL_DRAM_H__
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#include <linux/types.h>
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struct drm_i915_private;
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struct drm_device;
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struct dram_info {
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enum intel_dram_type {
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INTEL_DRAM_UNKNOWN,
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INTEL_DRAM_DDR2,
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INTEL_DRAM_DDR3,
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INTEL_DRAM_DDR4,
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INTEL_DRAM_LPDDR3,
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INTEL_DRAM_LPDDR4,
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INTEL_DRAM_DDR5,
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INTEL_DRAM_LPDDR5,
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INTEL_DRAM_GDDR,
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INTEL_DRAM_GDDR_ECC,
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__INTEL_DRAM_TYPE_MAX,
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} type;
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unsigned int fsb_freq;
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unsigned int mem_freq;
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u8 num_channels;
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u8 num_qgv_points;
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u8 num_psf_gv_points;
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bool ecc_impacting_de_bw; /* Only valid from Xe3p_LPD onward. */
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bool symmetric_memory;
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bool has_16gb_dimms;
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};
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void intel_dram_edram_detect(struct drm_i915_private *i915);
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int intel_dram_detect(struct drm_i915_private *i915);
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unsigned int intel_fsb_freq(struct drm_i915_private *i915);
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unsigned int intel_mem_freq(struct drm_i915_private *i915);
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const struct dram_info *intel_dram_info(struct drm_device *drm);
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const char *intel_dram_type_str(enum intel_dram_type type);
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#endif /* __INTEL_DRAM_H__ */
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