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The flush page DMA address is stored in a special register that is not
associated with the GPU's standard DMA range. For example, on Turing,
the GPU's MMU can handle 47-bit addresses, but the flush page address
register is limited to 40 bits.
At the point during device initialization when the flush page is
allocated, the DMA mask is still at its default of 32 bits. So even
though it's unlikely that the flush page could exist above a 40-bit
address, the dma_map_page() call could fail, e.g. if IOMMU is disabled
and the address is above 32 bits. The simplest way to achieve all
constraints is to allocate the page in the DMA32 zone. Since the flush
page is literally just a page, this is an acceptable limitation. The
alternative is to temporarily set the DMA mask to 40 (or 52 for Hopper
and later) bits, but that could have unforseen side effects.
In situations where the flush page is allocated above 32 bits and IOMMU
is disabled, you will get an error like this:
nouveau 0000:65:00.0: DMA addr 0x0000000107c56000+4096 overflow (mask ffffffff, bus limit 0).
Fixes: 5728d06419 ("drm/nouveau/fb: handle sysmem flush page from common code")
Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20251113230323.1271726-1-ttabi@nvidia.com
303 lines
7.3 KiB
C
303 lines
7.3 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "ram.h"
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#include <core/memory.h>
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#include <core/option.h>
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#include <subdev/bios.h>
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#include <subdev/bios/M0203.h>
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#include <engine/gr.h>
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#include <engine/mpeg.h>
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void
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nvkm_fb_tile_fini(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile)
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{
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fb->func->tile.fini(fb, region, tile);
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}
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void
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nvkm_fb_tile_init(struct nvkm_fb *fb, int region, u32 addr, u32 size,
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u32 pitch, u32 flags, struct nvkm_fb_tile *tile)
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{
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fb->func->tile.init(fb, region, addr, size, pitch, flags, tile);
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}
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void
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nvkm_fb_tile_prog(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile)
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{
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struct nvkm_device *device = fb->subdev.device;
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if (fb->func->tile.prog) {
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fb->func->tile.prog(fb, region, tile);
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if (device->gr)
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nvkm_engine_tile(&device->gr->engine, region);
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if (device->mpeg)
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nvkm_engine_tile(device->mpeg, region);
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}
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}
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static void
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nvkm_fb_sysmem_flush_page_init(struct nvkm_device *device)
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{
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struct nvkm_fb *fb = device->fb;
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if (fb->func->sysmem.flush_page_init)
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fb->func->sysmem.flush_page_init(fb);
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}
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int
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nvkm_fb_bios_memtype(struct nvkm_bios *bios)
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{
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struct nvkm_subdev *subdev = &bios->subdev;
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struct nvkm_device *device = subdev->device;
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const u8 ramcfg = (nvkm_rd32(device, 0x101000) & 0x0000003c) >> 2;
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struct nvbios_M0203E M0203E;
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u8 ver, hdr;
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if (nvbios_M0203Em(bios, ramcfg, &ver, &hdr, &M0203E)) {
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switch (M0203E.type) {
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case M0203E_TYPE_DDR2 : return NVKM_RAM_TYPE_DDR2;
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case M0203E_TYPE_DDR3 : return NVKM_RAM_TYPE_DDR3;
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case M0203E_TYPE_GDDR3 : return NVKM_RAM_TYPE_GDDR3;
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case M0203E_TYPE_GDDR5 : return NVKM_RAM_TYPE_GDDR5;
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case M0203E_TYPE_GDDR5X: return NVKM_RAM_TYPE_GDDR5X;
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case M0203E_TYPE_GDDR6 : return NVKM_RAM_TYPE_GDDR6;
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case M0203E_TYPE_HBM2 : return NVKM_RAM_TYPE_HBM2;
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default:
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nvkm_warn(subdev, "M0203E type %02x\n", M0203E.type);
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return NVKM_RAM_TYPE_UNKNOWN;
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}
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}
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nvkm_warn(subdev, "M0203E not matched!\n");
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return NVKM_RAM_TYPE_UNKNOWN;
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}
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static void
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nvkm_fb_intr(struct nvkm_subdev *subdev)
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{
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struct nvkm_fb *fb = nvkm_fb(subdev);
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if (fb->func->intr)
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fb->func->intr(fb);
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}
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static int
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nvkm_fb_oneinit(struct nvkm_subdev *subdev)
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{
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struct nvkm_fb *fb = nvkm_fb(subdev);
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u32 tags = 0;
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if (fb->func->ram_new) {
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int ret = fb->func->ram_new(fb, &fb->ram);
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if (ret) {
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nvkm_error(subdev, "vram setup failed, %d\n", ret);
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return ret;
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}
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}
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if (fb->func->oneinit) {
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int ret = fb->func->oneinit(fb);
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if (ret)
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return ret;
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}
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/* Initialise compression tag allocator.
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*
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* LTC oneinit() will override this on Fermi and newer.
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*/
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if (fb->func->tags) {
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tags = fb->func->tags(fb);
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nvkm_debug(subdev, "%d comptags\n", tags);
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}
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return nvkm_mm_init(&fb->tags.mm, 0, 0, tags, 1);
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}
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int
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nvkm_fb_mem_unlock(struct nvkm_fb *fb)
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{
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struct nvkm_subdev *subdev = &fb->subdev;
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int ret;
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if (!fb->func->vpr.scrub_required)
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return 0;
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ret = nvkm_subdev_oneinit(subdev);
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if (ret)
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return ret;
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if (!fb->func->vpr.scrub_required(fb)) {
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nvkm_debug(subdev, "VPR not locked\n");
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return 0;
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}
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nvkm_debug(subdev, "VPR locked, running scrubber binary\n");
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if (!fb->vpr_scrubber.fw.img) {
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nvkm_warn(subdev, "VPR locked, but no scrubber binary!\n");
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return 0;
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}
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ret = fb->func->vpr.scrub(fb);
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if (ret) {
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nvkm_error(subdev, "VPR scrubber binary failed\n");
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return ret;
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}
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if (fb->func->vpr.scrub_required(fb)) {
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nvkm_error(subdev, "VPR still locked after scrub!\n");
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return -EIO;
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}
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nvkm_debug(subdev, "VPR scrubber binary successful\n");
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return 0;
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}
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u64
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nvkm_fb_vidmem_size(struct nvkm_device *device)
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{
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struct nvkm_fb *fb = device->fb;
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if (fb && fb->func->vidmem.size)
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return fb->func->vidmem.size(fb);
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WARN_ON(1);
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return 0;
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}
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static int
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nvkm_fb_init(struct nvkm_subdev *subdev)
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{
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struct nvkm_fb *fb = nvkm_fb(subdev);
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int ret, i;
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if (fb->ram) {
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ret = nvkm_ram_init(fb->ram);
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if (ret)
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return ret;
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}
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for (i = 0; i < fb->tile.regions; i++)
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fb->func->tile.prog(fb, i, &fb->tile.region[i]);
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nvkm_fb_sysmem_flush_page_init(subdev->device);
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if (fb->func->init)
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fb->func->init(fb);
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if (fb->func->init_remapper)
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fb->func->init_remapper(fb);
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if (fb->func->init_page) {
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ret = fb->func->init_page(fb);
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if (WARN_ON(ret))
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return ret;
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}
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if (fb->func->init_unkn)
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fb->func->init_unkn(fb);
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return 0;
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}
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static int
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nvkm_fb_preinit(struct nvkm_subdev *subdev)
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{
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nvkm_fb_sysmem_flush_page_init(subdev->device);
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return 0;
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}
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static void *
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nvkm_fb_dtor(struct nvkm_subdev *subdev)
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{
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struct nvkm_fb *fb = nvkm_fb(subdev);
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int i;
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nvkm_memory_unref(&fb->mmu_wr);
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nvkm_memory_unref(&fb->mmu_rd);
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for (i = 0; i < fb->tile.regions; i++)
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fb->func->tile.fini(fb, i, &fb->tile.region[i]);
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nvkm_mm_fini(&fb->tags.mm);
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mutex_destroy(&fb->tags.mutex);
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nvkm_ram_del(&fb->ram);
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nvkm_falcon_fw_dtor(&fb->vpr_scrubber);
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if (fb->sysmem.flush_page) {
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dma_unmap_page(subdev->device->dev, fb->sysmem.flush_page_addr,
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PAGE_SIZE, DMA_BIDIRECTIONAL);
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__free_page(fb->sysmem.flush_page);
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}
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if (fb->func->dtor)
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return fb->func->dtor(fb);
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return fb;
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}
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static const struct nvkm_subdev_func
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nvkm_fb = {
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.dtor = nvkm_fb_dtor,
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.preinit = nvkm_fb_preinit,
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.oneinit = nvkm_fb_oneinit,
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.init = nvkm_fb_init,
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.intr = nvkm_fb_intr,
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};
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int
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nvkm_fb_ctor(const struct nvkm_fb_func *func, struct nvkm_device *device,
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enum nvkm_subdev_type type, int inst, struct nvkm_fb *fb)
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{
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nvkm_subdev_ctor(&nvkm_fb, device, type, inst, &fb->subdev);
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fb->func = func;
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fb->tile.regions = fb->func->tile.regions;
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fb->page = nvkm_longopt(device->cfgopt, "NvFbBigPage", fb->func->default_bigpage);
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mutex_init(&fb->tags.mutex);
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if (func->sysmem.flush_page_init) {
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fb->sysmem.flush_page = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
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if (!fb->sysmem.flush_page)
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return -ENOMEM;
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fb->sysmem.flush_page_addr = dma_map_page(device->dev, fb->sysmem.flush_page,
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0, PAGE_SIZE, DMA_BIDIRECTIONAL);
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if (dma_mapping_error(device->dev, fb->sysmem.flush_page_addr))
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return -EFAULT;
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}
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return 0;
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}
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int
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nvkm_fb_new_(const struct nvkm_fb_func *func, struct nvkm_device *device,
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enum nvkm_subdev_type type, int inst, struct nvkm_fb **pfb)
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{
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if (!(*pfb = kzalloc(sizeof(**pfb), GFP_KERNEL)))
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return -ENOMEM;
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return nvkm_fb_ctor(func, device, type, inst, *pfb);
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}
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