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31f99f6380
Enhance the PAT table dump by marking reserved entries with an asterisk (*) for improved readability and debugging. V2: Added a note in the "PAT table" header explaining the meaning of the asterisk(*) to improve clarity for readers. (Matt Roper) V3: Introduced a valid field in struct xe_pat_table_entry to explicitly track whether an entry is valid or reserved, avoiding reliance on coh_mode == 0. (Matt Roper) Signed-off-by: Xin Wang <x.wang@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patch.msgid.link/20251030221734.1058350-1-x.wang@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
62 lines
1.3 KiB
C
62 lines
1.3 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2023 Intel Corporation
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*/
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#ifndef _XE_PAT_H_
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#define _XE_PAT_H_
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#include <linux/types.h>
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struct drm_printer;
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struct xe_device;
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struct xe_gt;
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/**
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* struct xe_pat_table_entry - The pat_index encoding and other meta information.
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*/
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struct xe_pat_table_entry {
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/**
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* @value: The platform specific value encoding the various memory
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* attributes (this maps to some fixed pat_index). So things like
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* caching, coherency, compression etc can be encoded here.
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*/
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u32 value;
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/**
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* @coh_mode: The GPU coherency mode that @value maps to.
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*/
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#define XE_COH_NONE 1
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#define XE_COH_AT_LEAST_1WAY 2
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u16 coh_mode;
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/**
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* @valid: Set to 1 if the entry is valid, 0 if it's reserved.
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*/
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u16 valid;
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};
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/**
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* xe_pat_init_early - SW initialization, setting up data based on device
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* @xe: xe device
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*/
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void xe_pat_init_early(struct xe_device *xe);
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/**
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* xe_pat_init - Program HW PAT table
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* @gt: GT structure
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*/
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void xe_pat_init(struct xe_gt *gt);
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int xe_pat_dump(struct xe_gt *gt, struct drm_printer *p);
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/**
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* xe_pat_index_get_coh_mode - Extract the coherency mode for the given
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* pat_index.
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* @xe: xe device
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* @pat_index: The pat_index to query
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*/
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u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
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#endif
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