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Convert the micrel-ksz90x1.txt to DT schema. Create a separate YAML file for this PHY series. The old naming of ksz90x1 would be misleading in this case, so rename it to gigabit, as it contains ksz9xx1 and lan8xxx gigabit PHYs. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260116130948.79558-3-eichest@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
254 lines
7.7 KiB
YAML
254 lines
7.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/micrel,gigabit.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Micrel series Gigabit Ethernet PHYs
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maintainers:
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- Andrew Lunn <andrew@lunn.ch>
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- Stefan Eichenberger <eichest@gmail.com>
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description:
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Some boards require special skew tuning values, particularly when it comes
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to clock delays. These values can be specified in the device tree using
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the properties listed here.
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properties:
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compatible:
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enum:
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- ethernet-phy-id0022.1610 # KSZ9021
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- ethernet-phy-id0022.1611 # KSZ9021RLRN
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- ethernet-phy-id0022.1620 # KSZ9031
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- ethernet-phy-id0022.1631 # KSZ9477
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- ethernet-phy-id0022.1640 # KSZ9131
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- ethernet-phy-id0022.1650 # LAN8841
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- ethernet-phy-id0022.1660 # LAN8814
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- ethernet-phy-id0022.1670 # LAN8804
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micrel,force-master:
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type: boolean
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description: |
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Force phy to master mode. Only set this option if the phy reference
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clock provided at CLK125_NDO pin is used as MAC reference clock
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because the clock jitter in slave mode is too high (errata#2).
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Attention: The link partner must be configurable as slave otherwise
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no link will be established.
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coma-mode-gpios:
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maxItems: 1
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description: |
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If present the given gpio will be deasserted when the PHY is probed.
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Some PHYs have a COMA mode input pin which puts the PHY into
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isolate and power-down mode. On some boards this input is connected
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to a GPIO of the SoC.
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micrel,led-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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LED mode value to set for PHYs with configurable LEDs.
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Configure the LED mode with single value. The list of PHYs and the
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bits that are currently supported:
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LAN8814: register EP5.0, bit 6
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See the respective PHY datasheet for the mode values.
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minimum: 0
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maximum: 1
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patternProperties:
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'^([rt]xc)-skew-psec$':
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$ref: /schemas/types.yaml#/definitions/int32
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description:
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Skew control of the pad in picoseconds.
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minimum: -700
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maximum: 2400
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multipleOf: 100
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default: 0
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'^([rt]xd[0-3]|rxdv|txen)-skew-psec$':
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$ref: /schemas/types.yaml#/definitions/int32
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description: |
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Skew control of the pad in picoseconds.
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minimum: -700
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maximum: 800
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multipleOf: 100
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default: 0
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allOf:
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- $ref: ethernet-phy.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- ethernet-phy-id0022.1610
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- ethernet-phy-id0022.1611
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then:
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patternProperties:
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'^([rt]xd[0-3]|[rt]xc|rxdv|txen)-skew-ps$':
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description: |
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Skew control of the pad in picoseconds.
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The actual increment on the chip is 120ps ranging from -840ps to
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960ps, this mismatch comes from a documentation error before
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datasheet revision 1.2 (Feb 2014).
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The device tree value to delay mapping looks as follows:
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Device Tree Value Delay
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--------------------------
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0 -840ps
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200 -720ps
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400 -600ps
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600 -480ps
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800 -360ps
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1000 -240ps
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1200 -120ps
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1400 0ps
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1600 120ps
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1800 240ps
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2000 360ps
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2200 480ps
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2400 600ps
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2600 720ps
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2800 840ps
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3000 960ps
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minimum: 0
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maximum: 3000
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multipleOf: 200
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default: 1400
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- if:
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properties:
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compatible:
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contains:
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const: ethernet-phy-id0022.1620
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then:
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patternProperties:
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'^([rt]xc)-skew-ps$':
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description: |
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Skew control of the pad in picoseconds.
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The device tree value to delay mapping is as follows:
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Device Tree Value Delay
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--------------------------
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0 -900ps
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60 -840ps
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120 -780ps
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180 -720ps
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240 -660ps
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300 -600ps
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360 -540ps
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420 -480ps
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480 -420ps
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540 -360ps
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600 -300ps
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660 -240ps
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720 -180ps
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780 -120ps
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840 -60ps
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900 0ps
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960 60ps
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1020 120ps
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1080 180ps
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1140 240ps
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1200 300ps
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1260 360ps
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1320 420ps
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1380 480ps
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1440 540ps
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1500 600ps
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1560 660ps
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1620 720ps
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1680 780ps
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1740 840ps
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1800 900ps
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1860 960ps
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minimum: 0
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maximum: 1860
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multipleOf: 60
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default: 900
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'^([rt]xd[0-3]|rxdv|txen)-skew-ps$':
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description: |
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Skew control of the pad in picoseconds.
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The device tree value to delay mapping is as follows:
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Device Tree Value Delay
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--------------------------
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0 -420ps
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60 -360ps
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120 -300ps
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180 -240ps
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240 -180ps
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300 -120ps
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360 -60ps
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420 0ps
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480 60ps
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540 120ps
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600 180ps
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660 240ps
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720 300ps
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780 360ps
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840 420ps
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900 480ps
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minimum: 0
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maximum: 900
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multipleOf: 60
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default: 420
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- if:
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not:
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properties:
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compatible:
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contains:
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enum:
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- ethernet-phy-id0022.1640
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- ethernet-phy-id0022.1650
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then:
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patternProperties:
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'^([rt]xd[0-3]|[rt]xc|rxdv|txen)-skew-psec$': false
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- if:
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not:
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properties:
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compatible:
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contains:
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const: ethernet-phy-id0022.1620
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then:
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properties:
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micrel,force-master: false
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- if:
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not:
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properties:
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compatible:
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contains:
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const: ethernet-phy-id0022.1660
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then:
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properties:
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coma-mode-gpios: false
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micrel,led-mode: false
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unevaluatedProperties: false
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examples:
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- |
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-phy@7 {
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compatible = "ethernet-phy-id0022.1610";
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reg = <7>;
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rxc-skew-ps = <3000>;
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rxdv-skew-ps = <0>;
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txc-skew-ps = <3000>;
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txen-skew-ps = <0>;
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};
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ethernet-phy@9 {
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compatible = "ethernet-phy-id0022.1640";
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reg = <9>;
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rxc-skew-psec = <(-100)>;
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txc-skew-psec = <(-100)>;
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};
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};
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