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20165a8ac6
Document the required configuration to enable the PCIe Endpoint controller on SA8255p which is managed by firmware using power-domain based handling. Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com> [mani: added MAINTAINERS entry] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260106-firmware_managed_ep-v5-1-1933432127ec@oss.qualcomm.com
111 lines
2.9 KiB
YAML
111 lines
2.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/qcom,sa8255p-pcie-ep.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm firmware managed PCIe Endpoint Controller
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description:
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Qualcomm SA8255p SoC PCIe endpoint controller is based on the Synopsys
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DesignWare PCIe IP which is managed by firmware.
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maintainers:
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- Manivannan Sadhasivam <mani@kernel.org>
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properties:
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compatible:
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const: qcom,sa8255p-pcie-ep
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reg:
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items:
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- description: Qualcomm-specific PARF configuration registers
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- description: DesignWare PCIe registers
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- description: External local bus interface registers
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- description: Address Translation Unit (ATU) registers
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- description: Memory region used to map remote RC address space
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- description: BAR memory region
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- description: DMA register space
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reg-names:
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items:
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- const: parf
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- const: dbi
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- const: elbi
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- const: atu
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- const: addr_space
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- const: mmio
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- const: dma
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interrupts:
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items:
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- description: PCIe Global interrupt
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- description: PCIe Doorbell interrupt
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- description: DMA interrupt
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interrupt-names:
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items:
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- const: global
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- const: doorbell
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- const: dma
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iommus:
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maxItems: 1
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reset-gpios:
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description: GPIO used as PERST# input signal
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maxItems: 1
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wake-gpios:
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description: GPIO used as WAKE# output signal
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maxItems: 1
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power-domains:
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maxItems: 1
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dma-coherent: true
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num-lanes:
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default: 2
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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- reset-gpios
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- power-domains
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie1_ep: pcie-ep@1c10000 {
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compatible = "qcom,sa8255p-pcie-ep";
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reg = <0x0 0x01c10000 0x0 0x3000>,
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<0x0 0x60000000 0x0 0xf20>,
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<0x0 0x60000f20 0x0 0xa8>,
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<0x0 0x60001000 0x0 0x4000>,
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<0x0 0x60200000 0x0 0x100000>,
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<0x0 0x01c13000 0x0 0x1000>,
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<0x0 0x60005000 0x0 0x2000>;
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reg-names = "parf", "dbi", "elbi", "atu", "addr_space", "mmio", "dma";
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interrupts = <GIC_SPI 518 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "global", "doorbell", "dma";
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reset-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
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dma-coherent;
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iommus = <&pcie_smmu 0x80 0x7f>;
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power-domains = <&scmi6_pd 1>;
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num-lanes = <4>;
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};
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};
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