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Document USB2.0 phy bindings for RZ/G3E ("R9A09G047") SoC.
The RZ/G3E USB2.0 phy is functionally identical to the one found
on the RZ/V2H(P), so no driver changes are needed. The existing
"renesas,usb2-phy-r9a09g057" will be used as a fallback compatible for
this IP.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Link: https://patch.msgid.link/4f2454708428b48e03faabe79e383999fb1ab458.1766405010.git.tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
176 lines
4.3 KiB
YAML
176 lines
4.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car generation 3 USB 2.0 PHY
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maintainers:
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- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,usb2-phy-r8a77470 # RZ/G1C
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- renesas,usb2-phy-r9a08g045 # RZ/G3S
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- renesas,usb2-phy-r9a09g057 # RZ/V2H(P)
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- items:
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- enum:
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- renesas,usb2-phy-r7s9210 # RZ/A2
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- renesas,usb2-phy-r8a774a1 # RZ/G2M
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- renesas,usb2-phy-r8a774b1 # RZ/G2N
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- renesas,usb2-phy-r8a774c0 # RZ/G2E
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- renesas,usb2-phy-r8a774e1 # RZ/G2H
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- renesas,usb2-phy-r8a7795 # R-Car H3
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- renesas,usb2-phy-r8a7796 # R-Car M3-W
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- renesas,usb2-phy-r8a77961 # R-Car M3-W+
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- renesas,usb2-phy-r8a77965 # R-Car M3-N
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- renesas,usb2-phy-r8a77990 # R-Car E3
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- renesas,usb2-phy-r8a77995 # R-Car D3
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- const: renesas,rcar-gen3-usb2-phy
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- items:
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- enum:
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- renesas,usb2-phy-r9a07g043 # RZ/G2UL
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- renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}
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- renesas,usb2-phy-r9a07g054 # RZ/V2L
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- const: renesas,rzg2l-usb2-phy
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- items:
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- enum:
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- renesas,usb2-phy-r9a09g047 # RZ/G3E
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- renesas,usb2-phy-r9a09g056 # RZ/V2N
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- const: renesas,usb2-phy-r9a09g057
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- const: renesas,usb2-phy-r9a09g077 # RZ/T2H
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- items:
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- const: renesas,usb2-phy-r9a09g087 # RZ/N2H
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- const: renesas,usb2-phy-r9a09g077
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reg:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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minItems: 1
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items:
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- const: fck
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- const: usb_x1
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'#phy-cells':
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enum: [0, 1] # and 0 is deprecated.
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description: |
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The phandle's argument in the PHY specifier is the INT_STATUS bit of
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controller.
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- 1 = USBH_INTA (OHCI)
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- 2 = USBH_INTB (EHCI)
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- 3 = UCOM_INT (OTG and BC)
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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minItems: 1
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items:
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- description: reset of USB 2.0 host side
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- description: reset of USB 2.0 peripheral side
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vbus-supply:
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description: |
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Phandle to a regulator that provides power to the VBUS. This regulator
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will be managed during the PHY power on/off sequence.
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vbus-regulator:
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$ref: /schemas/regulator/regulator.yaml#
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description: USB VBUS internal regulator
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type: object
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unevaluatedProperties: false
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renesas,no-otg-pins:
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$ref: /schemas/types.yaml#/definitions/flag
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description: |
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specify when a board does not provide proper otg pins.
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dr_mode: true
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mux-states:
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description:
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phandle to a mux controller node that select the source for USB VBUS.
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maxItems: 1
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if:
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properties:
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compatible:
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contains:
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const: renesas,usb2-phy-r7s9210
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then:
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required:
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- clock-names
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required:
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- compatible
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- reg
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- clocks
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- '#phy-cells'
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,usb2-phy-r9a09g057
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- renesas,usb2-phy-r9a08g045
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- renesas,rzg2l-usb2-phy
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then:
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properties:
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clocks:
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minItems: 2
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required:
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- resets
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- if:
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properties:
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compatible:
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contains:
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const: renesas,usb2-phy-r9a09g077
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then:
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properties:
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clocks:
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minItems: 2
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resets: false
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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usb-phy@ee080200 {
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compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
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reg = <0xee080200 0x700>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 703>;
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#phy-cells = <1>;
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};
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usb-phy@ee0a0200 {
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compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
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reg = <0xee0a0200 0x700>;
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clocks = <&cpg CPG_MOD 702>;
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#phy-cells = <1>;
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};
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