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The Cirrus CS4271 codec can use an external clock as an input Master Clock. When no crystal is used, the CS4271 component considers its MCLK pin as an input pin and expects the external clock connected to provide the Master Clock. This clock is not documented in the binding. Add the missing clock. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251029093921.624088-4-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
112 lines
2.5 KiB
YAML
112 lines
2.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/cirrus,cs4271.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cirrus Logic CS4271 audio CODEC
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maintainers:
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- Alexander Sverdlin <alexander.sverdlin@gmail.com>
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- Nikita Shubin <nikita.shubin@maquefel.me>
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description:
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The CS4271 is a stereo audio codec. This device supports both the I2C
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and the SPI bus.
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allOf:
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- $ref: dai-common.yaml#
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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compatible:
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const: cirrus,cs4271
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reg:
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maxItems: 1
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clocks:
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items:
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- description:
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Master clock connected to the MCLK pin if MCLK is an input (i.e. no
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crystal used).
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clock-names:
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items:
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- const: mclk
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spi-cpha: true
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spi-cpol: true
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'#sound-dai-cells':
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const: 0
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reset-gpios:
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description:
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This pin will be deasserted before communication to the codec starts.
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maxItems: 1
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va-supply:
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description: Analog power supply.
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vd-supply:
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description: Digital power supply.
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vl-supply:
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description: Serial Control Port power supply.
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port:
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$ref: audio-graph-port.yaml#
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unevaluatedProperties: false
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cirrus,amuteb-eq-bmutec:
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description:
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When given, the Codec's AMUTEB=BMUTEC flag is enabled.
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type: boolean
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cirrus,enable-soft-reset:
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description: |
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The CS4271 requires its LRCLK and MCLK to be stable before its RESET
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line is de-asserted. That also means that clocks cannot be changed
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without putting the chip back into hardware reset, which also requires
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a complete re-initialization of all registers.
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One (undocumented) workaround is to assert and de-assert the PDN bit
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in the MODE2 register. This workaround can be enabled with this DT
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property.
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Note that this is not needed in case the clocks are stable
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throughout the entire runtime of the codec.
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type: boolean
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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codec@0 {
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compatible = "cirrus,cs4271";
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reg = <0>;
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#sound-dai-cells = <0>;
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spi-max-frequency = <6000000>;
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spi-cpol;
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spi-cpha;
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reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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port {
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endpoint {
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remote-endpoint = <&i2s_ep>;
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};
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};
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};
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};
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...
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