mirror of
https://github.com/torvalds/linux.git
synced 2026-04-18 14:53:58 -04:00
Both the hardware and driver already support polling mode. By removing the mandatory IRQ requirement during probe, the driver can now fall back to polling when an interrupt is unavailable, ensuring compatibility with a wider range of systems. Signed-off-by: Abdurrahman Hussain <abdurrahman@nexthop.ai> Link: https://patch.msgid.link/20260119-spi-xilinx-v3-1-4566c33bac0d@nexthop.ai Signed-off-by: Mark Brown <broonie@kernel.org>
55 lines
1.0 KiB
YAML
55 lines
1.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/spi/spi-xilinx.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Xilinx SPI controller
|
|
|
|
maintainers:
|
|
- Michal Simek <michal.simek@amd.com>
|
|
|
|
allOf:
|
|
- $ref: spi-controller.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- xlnx,xps-spi-2.00.a
|
|
- xlnx,xps-spi-2.00.b
|
|
- xlnx,axi-quad-spi-1.00.a
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
xlnx,num-ss-bits:
|
|
description: Number of chip selects used.
|
|
minimum: 1
|
|
maximum: 32
|
|
|
|
xlnx,num-transfer-bits:
|
|
description: Number of bits per transfer. This will be 8 if not specified.
|
|
enum: [8, 16, 32]
|
|
default: 8
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
spi0: spi@41e00000 {
|
|
compatible = "xlnx,xps-spi-2.00.a";
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <0 31 1>;
|
|
reg = <0x41e00000 0x10000>;
|
|
xlnx,num-ss-bits = <0x1>;
|
|
xlnx,num-transfer-bits = <32>;
|
|
};
|
|
...
|