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c2d55e709a
Only the PCH identification code needs the PCH device IDs, as all the PCH checks are now based on PCH type. Hide the PCH device IDs inside intel_pch.c. Remove the unused INTEL_PCH_ID() macro while at it. Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/d1ceb9fc461cf21e1b885a55293f593eba1458ea.1738923308.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
57 lines
2.1 KiB
C
57 lines
2.1 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright 2019 Intel Corporation.
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*/
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#ifndef __INTEL_PCH__
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#define __INTEL_PCH__
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struct drm_i915_private;
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/*
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* Sorted by south display engine compatibility.
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* If the new PCH comes with a south display engine that is not
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* inherited from the latest item, please do not add it to the
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* end. Instead, add it right after its "parent" PCH.
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*/
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enum intel_pch {
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PCH_NOP = -1, /* PCH without south display */
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PCH_NONE = 0, /* No PCH present */
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PCH_IBX, /* Ibexpeak PCH */
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PCH_CPT, /* Cougarpoint/Pantherpoint PCH */
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PCH_LPT_H, /* Lynxpoint/Wildcatpoint H PCH */
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PCH_LPT_LP, /* Lynxpoint/Wildcatpoint LP PCH */
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PCH_SPT, /* Sunrisepoint/Kaby Lake PCH */
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PCH_CNP, /* Cannon/Comet Lake PCH */
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PCH_ICP, /* Ice Lake/Jasper Lake PCH */
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PCH_TGP, /* Tiger Lake/Mule Creek Canyon PCH */
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PCH_ADP, /* Alder Lake PCH */
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/* Fake PCHs, functionality handled on the same PCI dev */
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PCH_DG1 = 1024,
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PCH_DG2,
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PCH_MTL,
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PCH_LNL,
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};
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#define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
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#define HAS_PCH_DG2(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_DG2)
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#define HAS_PCH_ADP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ADP)
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#define HAS_PCH_DG1(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_DG1)
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#define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP)
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#define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
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#define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
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#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
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#define HAS_PCH_LPT_H(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT_H)
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#define HAS_PCH_LPT_LP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT_LP)
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#define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT_H || \
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INTEL_PCH_TYPE(dev_priv) == PCH_LPT_LP)
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#define HAS_PCH_CPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CPT)
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#define HAS_PCH_IBX(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_IBX)
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#define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
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#define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) != PCH_NONE)
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void intel_detect_pch(struct drm_i915_private *dev_priv);
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#endif /* __INTEL_PCH__ */
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