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8ca0b875c0
At the moment a modeset fails if the config computation of a pipe can't fit its required BW to the available link BW even though the limitation may be resolved by reducing the BW requirement of other pipes. To improve the above this patch adds helper functions checking the overall BW limits after all CRTC states have been computed. If the check fails the maximum link bpp for a selected pipe will be reduced and all the CRTC states will be recomputed until either the overall BW limit check passes, or further bpp reduction is not possible (because all pipes/encoders sharing the link BW reached their minimum link bpp). Atm, the MST encoder allocates twice the required BW for YUV420 format streams. A follow-up patchset will fix that, add a code comment about this. This change prepares for upcoming patches enabling the above BW management on FDI and MST links. v2: - Rename intel_crtc_state::max_link_bpp to max_link_bpp_x16 and intel_link_bw_limits::max_bpp to max_bpp_x16. (Jani) v3: - Add the helper functions in a separate patch. (Ville) - Add the functions to intel_link_bw.c instead of intel_atomic.c (Ville) - Return -ENOSPC instead of -EINVAL to userspace in case of a link BW limit failure. v4: - Make intel_atomic_check_config() static. v5: (Ville) - Rename intel_link_bw_limits::min_bpp_pipes to min_bpp_reached_pipes and intel_link_bw_reset_pipe_limit_to_min() to intel_link_bw_set_min_bpp_for_pipe(). - Rename pipe_bpp to link_bpp in intel_link_bw_reduce_bpp(). - Add FIXME: comment about MST encoder's YUV420 BW allocation and tracking the link bpp limit accordingly. v6: - Move intel_link_bw_compute_pipe_bpp() to intel_fdi.c (Ville) - WARN_ON(BIT(pipe) & min_bpp_reached_pipes) in intel_link_bw_set_bpp_limit_for_pipe(). (Ville) - Rename intel_link_bw_set_min_bpp_for_pipe() to intel_link_bw_set_bpp_limit_for_pipe() and intel_link_bw_limits::min_bpp_reached_pipes to bpp_limit_reached_pipes. (Ville) - Remove unused header includes. Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230921195159.2646027-10-imre.deak@intel.com
411 lines
11 KiB
Makefile
411 lines
11 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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# Add a set of useful warning flags and enable -Werror for CI to prevent
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# trivial mistakes from creeping in. We have to do this piecemeal as we reject
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# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
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# need to filter out dubious warnings. Still it is our interest
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# to keep running locally with W=1 C=1 until we are completely clean.
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#
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# Note the danger in using -Wall -Wextra is that when CI updates gcc we
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# will most likely get a sudden build breakage... Hopefully we will fix
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# new warnings before CI updates!
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subdir-ccflags-y := -Wall -Wextra
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subdir-ccflags-y += -Wno-format-security
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subdir-ccflags-y += -Wno-unused-parameter
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subdir-ccflags-y += -Wno-type-limits
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subdir-ccflags-y += -Wno-missing-field-initializers
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subdir-ccflags-y += -Wno-sign-compare
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subdir-ccflags-y += -Wno-shift-negative-value
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subdir-ccflags-y += $(call cc-option, -Wunused-but-set-variable)
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subdir-ccflags-y += $(call cc-disable-warning, frame-address)
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subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
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# Fine grained warnings disable
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CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
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CFLAGS_display/intel_display_device.o = $(call cc-disable-warning, override-init)
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CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init)
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subdir-ccflags-y += -I$(srctree)/$(src)
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# Please keep these build lists sorted!
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# core driver code
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i915-y += i915_driver.o \
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i915_drm_client.o \
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i915_config.o \
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i915_getparam.o \
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i915_ioctl.o \
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i915_irq.o \
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i915_mitigations.o \
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i915_module.o \
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i915_params.o \
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i915_pci.o \
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i915_scatterlist.o \
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i915_suspend.o \
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i915_switcheroo.o \
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i915_sysfs.o \
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i915_utils.o \
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intel_clock_gating.o \
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intel_device_info.o \
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intel_memory_region.o \
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intel_pcode.o \
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intel_region_ttm.o \
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intel_runtime_pm.o \
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intel_sbi.o \
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intel_step.o \
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intel_uncore.o \
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intel_wakeref.o \
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vlv_sideband.o \
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vlv_suspend.o
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# core peripheral code
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i915-y += \
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soc/intel_dram.o \
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soc/intel_gmch.o \
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soc/intel_pch.o
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# core library code
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i915-y += \
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i915_memcpy.o \
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i915_mm.o \
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i915_sw_fence.o \
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i915_sw_fence_work.o \
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i915_syncmap.o \
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i915_user_extensions.o
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i915-$(CONFIG_COMPAT) += i915_ioc32.o
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i915-$(CONFIG_DEBUG_FS) += \
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i915_debugfs.o \
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i915_debugfs_params.o \
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display/intel_display_debugfs.o \
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display/intel_pipe_crc.o
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i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
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# "Graphics Technology" (aka we talk to the gpu)
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gt-y += \
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gt/gen2_engine_cs.o \
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gt/gen6_engine_cs.o \
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gt/gen6_ppgtt.o \
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gt/gen7_renderclear.o \
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gt/gen8_engine_cs.o \
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gt/gen8_ppgtt.o \
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gt/intel_breadcrumbs.o \
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gt/intel_context.o \
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gt/intel_context_sseu.o \
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gt/intel_engine_cs.o \
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gt/intel_engine_heartbeat.o \
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gt/intel_engine_pm.o \
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gt/intel_engine_user.o \
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gt/intel_execlists_submission.o \
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gt/intel_ggtt.o \
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gt/intel_ggtt_fencing.o \
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gt/intel_gt.o \
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gt/intel_gt_buffer_pool.o \
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gt/intel_gt_clock_utils.o \
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gt/intel_gt_debugfs.o \
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gt/intel_gt_engines_debugfs.o \
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gt/intel_gt_irq.o \
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gt/intel_gt_mcr.o \
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gt/intel_gt_pm.o \
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gt/intel_gt_pm_debugfs.o \
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gt/intel_gt_pm_irq.o \
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gt/intel_gt_requests.o \
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gt/intel_gt_sysfs.o \
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gt/intel_gt_sysfs_pm.o \
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gt/intel_gtt.o \
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gt/intel_llc.o \
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gt/intel_lrc.o \
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gt/intel_migrate.o \
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gt/intel_mocs.o \
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gt/intel_ppgtt.o \
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gt/intel_rc6.o \
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gt/intel_region_lmem.o \
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gt/intel_renderstate.o \
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gt/intel_reset.o \
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gt/intel_ring.o \
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gt/intel_ring_submission.o \
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gt/intel_rps.o \
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gt/intel_sa_media.o \
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gt/intel_sseu.o \
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gt/intel_sseu_debugfs.o \
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gt/intel_timeline.o \
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gt/intel_tlb.o \
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gt/intel_wopcm.o \
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gt/intel_workarounds.o \
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gt/shmem_utils.o \
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gt/sysfs_engines.o
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# x86 intel-gtt module support
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gt-$(CONFIG_X86) += gt/intel_ggtt_gmch.o
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# autogenerated null render state
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gt-y += \
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gt/gen6_renderstate.o \
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gt/gen7_renderstate.o \
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gt/gen8_renderstate.o \
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gt/gen9_renderstate.o
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i915-y += $(gt-y)
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# GEM (Graphics Execution Management) code
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gem-y += \
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gem/i915_gem_busy.o \
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gem/i915_gem_clflush.o \
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gem/i915_gem_context.o \
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gem/i915_gem_create.o \
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gem/i915_gem_dmabuf.o \
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gem/i915_gem_domain.o \
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gem/i915_gem_execbuffer.o \
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gem/i915_gem_internal.o \
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gem/i915_gem_object.o \
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gem/i915_gem_lmem.o \
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gem/i915_gem_mman.o \
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gem/i915_gem_pages.o \
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gem/i915_gem_phys.o \
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gem/i915_gem_pm.o \
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gem/i915_gem_region.o \
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gem/i915_gem_shmem.o \
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gem/i915_gem_shrinker.o \
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gem/i915_gem_stolen.o \
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gem/i915_gem_throttle.o \
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gem/i915_gem_tiling.o \
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gem/i915_gem_ttm.o \
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gem/i915_gem_ttm_move.o \
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gem/i915_gem_ttm_pm.o \
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gem/i915_gem_userptr.o \
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gem/i915_gem_wait.o \
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gem/i915_gemfs.o
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i915-y += \
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$(gem-y) \
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i915_active.o \
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i915_cmd_parser.o \
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i915_deps.o \
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i915_gem_evict.o \
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i915_gem_gtt.o \
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i915_gem_ww.o \
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i915_gem.o \
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i915_query.o \
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i915_request.o \
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i915_scheduler.o \
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i915_trace_points.o \
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i915_ttm_buddy_manager.o \
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i915_vma.o \
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i915_vma_resource.o
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# general-purpose microcontroller (GuC) support
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i915-y += \
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gt/uc/intel_gsc_fw.o \
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gt/uc/intel_gsc_proxy.o \
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gt/uc/intel_gsc_uc.o \
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gt/uc/intel_gsc_uc_debugfs.o \
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gt/uc/intel_gsc_uc_heci_cmd_submit.o \
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gt/uc/intel_guc.o \
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gt/uc/intel_guc_ads.o \
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gt/uc/intel_guc_capture.o \
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gt/uc/intel_guc_ct.o \
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gt/uc/intel_guc_debugfs.o \
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gt/uc/intel_guc_fw.o \
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gt/uc/intel_guc_hwconfig.o \
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gt/uc/intel_guc_log.o \
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gt/uc/intel_guc_log_debugfs.o \
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gt/uc/intel_guc_rc.o \
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gt/uc/intel_guc_slpc.o \
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gt/uc/intel_guc_submission.o \
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gt/uc/intel_huc.o \
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gt/uc/intel_huc_debugfs.o \
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gt/uc/intel_huc_fw.o \
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gt/uc/intel_uc.o \
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gt/uc/intel_uc_debugfs.o \
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gt/uc/intel_uc_fw.o
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# graphics system controller (GSC) support
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i915-y += gt/intel_gsc.o
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# graphics hardware monitoring (HWMON) support
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i915-$(CONFIG_HWMON) += i915_hwmon.o
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# modesetting core code
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i915-y += \
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display/hsw_ips.o \
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display/intel_atomic.o \
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display/intel_atomic_plane.o \
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display/intel_audio.o \
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display/intel_bios.o \
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display/intel_bw.o \
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display/intel_cdclk.o \
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display/intel_color.o \
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display/intel_combo_phy.o \
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display/intel_connector.o \
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display/intel_crtc.o \
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display/intel_crtc_state_dump.o \
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display/intel_cursor.o \
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display/intel_display.o \
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display/intel_display_driver.o \
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display/intel_display_irq.o \
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display/intel_display_power.o \
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display/intel_display_power_map.o \
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display/intel_display_power_well.o \
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display/intel_display_reset.o \
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display/intel_display_rps.o \
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display/intel_display_wa.o \
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display/intel_dmc.o \
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display/intel_dpio_phy.o \
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display/intel_dpll.o \
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display/intel_dpll_mgr.o \
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display/intel_dpt.o \
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display/intel_drrs.o \
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display/intel_dsb.o \
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display/intel_fb.o \
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display/intel_fb_pin.o \
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display/intel_fbc.o \
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display/intel_fdi.o \
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display/intel_fifo_underrun.o \
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display/intel_frontbuffer.o \
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display/intel_global_state.o \
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display/intel_hdcp.o \
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display/intel_hdcp_gsc.o \
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display/intel_hotplug.o \
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display/intel_hotplug_irq.o \
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display/intel_hti.o \
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display/intel_link_bw.o \
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display/intel_load_detect.o \
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display/intel_lpe_audio.o \
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display/intel_modeset_lock.o \
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display/intel_modeset_verify.o \
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display/intel_modeset_setup.o \
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display/intel_overlay.o \
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display/intel_pch_display.o \
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display/intel_pch_refclk.o \
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display/intel_plane_initial.o \
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display/intel_pmdemand.o \
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display/intel_psr.o \
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display/intel_quirks.o \
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display/intel_sprite.o \
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display/intel_sprite_uapi.o \
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display/intel_tc.o \
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display/intel_vblank.o \
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display/intel_vga.o \
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display/intel_wm.o \
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display/i9xx_plane.o \
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display/i9xx_wm.o \
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display/skl_scaler.o \
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display/skl_universal_plane.o \
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display/skl_watermark.o
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i915-$(CONFIG_ACPI) += \
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display/intel_acpi.o \
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display/intel_opregion.o
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i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
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display/intel_fbdev.o
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# modesetting output/encoder code
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i915-y += \
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display/dvo_ch7017.o \
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display/dvo_ch7xxx.o \
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display/dvo_ivch.o \
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display/dvo_ns2501.o \
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display/dvo_sil164.o \
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display/dvo_tfp410.o \
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display/g4x_dp.o \
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display/g4x_hdmi.o \
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display/icl_dsi.o \
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display/intel_backlight.o \
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display/intel_crt.o \
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display/intel_cx0_phy.o \
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display/intel_ddi.o \
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display/intel_ddi_buf_trans.o \
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display/intel_display_device.o \
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display/intel_display_trace.o \
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display/intel_dkl_phy.o \
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display/intel_dp.o \
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display/intel_dp_aux.o \
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display/intel_dp_aux_backlight.o \
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display/intel_dp_hdcp.o \
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display/intel_dp_link_training.o \
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display/intel_dp_mst.o \
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display/intel_dsi.o \
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display/intel_dsi_dcs_backlight.o \
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display/intel_dsi_vbt.o \
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display/intel_dvo.o \
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display/intel_gmbus.o \
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display/intel_hdmi.o \
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display/intel_lspcon.o \
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display/intel_lvds.o \
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display/intel_panel.o \
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display/intel_pps.o \
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display/intel_qp_tables.o \
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display/intel_sdvo.o \
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display/intel_snps_phy.o \
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display/intel_tv.o \
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display/intel_vdsc.o \
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display/intel_vrr.o \
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display/vlv_dsi.o \
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display/vlv_dsi_pll.o
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i915-y += i915_perf.o
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# Protected execution platform (PXP) support. Base support is required for HuC
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i915-y += \
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pxp/intel_pxp.o \
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pxp/intel_pxp_tee.o \
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pxp/intel_pxp_huc.o
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i915-$(CONFIG_DRM_I915_PXP) += \
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pxp/intel_pxp_cmd.o \
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pxp/intel_pxp_debugfs.o \
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pxp/intel_pxp_gsccs.o \
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pxp/intel_pxp_irq.o \
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pxp/intel_pxp_pm.o \
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pxp/intel_pxp_session.o
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# Post-mortem debug and GPU hang state capture
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i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
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i915-$(CONFIG_DRM_I915_SELFTEST) += \
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gem/selftests/i915_gem_client_blt.o \
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gem/selftests/igt_gem_utils.o \
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selftests/intel_scheduler_helpers.o \
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selftests/i915_random.o \
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selftests/i915_selftest.o \
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selftests/igt_atomic.o \
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selftests/igt_flush_test.o \
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selftests/igt_live_test.o \
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selftests/igt_mmap.o \
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selftests/igt_reset.o \
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selftests/igt_spinner.o \
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selftests/librapl.o
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# virtual gpu code
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i915-y += i915_vgpu.o
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i915-$(CONFIG_DRM_I915_GVT) += \
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intel_gvt.o \
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intel_gvt_mmio_table.o
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include $(src)/gvt/Makefile
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obj-$(CONFIG_DRM_I915) += i915.o
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obj-$(CONFIG_DRM_I915_GVT_KVMGT) += kvmgt.o
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# kernel-doc test
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#
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# Enable locally for CONFIG_DRM_I915_WERROR=y. See also scripts/Makefile.build
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ifdef CONFIG_DRM_I915_WERROR
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cmd_checkdoc = $(srctree)/scripts/kernel-doc -none -Werror $<
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endif
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# header test
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# exclude some broken headers from the test coverage
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no-header-test := \
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display/intel_vbt_defs.h
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always-$(CONFIG_DRM_I915_WERROR) += \
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$(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \
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$(shell cd $(srctree)/$(src) && find * -name '*.h')))
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quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)
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cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; \
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$(srctree)/scripts/kernel-doc -none -Werror $<; touch $@
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$(obj)/%.hdrtest: $(src)/%.h FORCE
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$(call if_changed_dep,hdrtest)
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