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052aa3cce3
Add a Intel event file for perf. Signed-off-by: Andi Kleen <ak@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Link: http://lkml.kernel.org/n/tip-7r1wcyb5ucqxsqzcljt3iz3b@git.kernel.org [ Lowercased the directory and file names ] Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
83 lines
2.5 KiB
JSON
83 lines
2.5 KiB
JSON
[
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{
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"EventCode": "0x80",
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"Counter": "0,1",
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"UMask": "0x3",
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"EventName": "ICACHE.ACCESSES",
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"SampleAfterValue": "200000",
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"BriefDescription": "Instruction fetches."
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},
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{
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"EventCode": "0x80",
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"Counter": "0,1",
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"UMask": "0x1",
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"EventName": "ICACHE.HIT",
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"SampleAfterValue": "200000",
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"BriefDescription": "Icache hit"
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},
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{
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"EventCode": "0x80",
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"Counter": "0,1",
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"UMask": "0x2",
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"EventName": "ICACHE.MISSES",
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"SampleAfterValue": "200000",
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"BriefDescription": "Icache miss"
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},
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{
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"EventCode": "0x86",
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"Counter": "0,1",
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"UMask": "0x1",
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"EventName": "CYCLES_ICACHE_MEM_STALLED.ICACHE_MEM_STALLED",
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"SampleAfterValue": "2000000",
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"BriefDescription": "Cycles during which instruction fetches are stalled."
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},
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{
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"EventCode": "0x87",
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"Counter": "0,1",
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"UMask": "0x1",
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"EventName": "DECODE_STALL.PFB_EMPTY",
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"SampleAfterValue": "2000000",
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"BriefDescription": "Decode stall due to PFB empty"
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},
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{
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"EventCode": "0x87",
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"Counter": "0,1",
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"UMask": "0x2",
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"EventName": "DECODE_STALL.IQ_FULL",
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"SampleAfterValue": "2000000",
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"BriefDescription": "Decode stall due to IQ full"
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},
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{
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"EventCode": "0xAA",
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"Counter": "0,1",
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"UMask": "0x1",
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"EventName": "MACRO_INSTS.NON_CISC_DECODED",
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"SampleAfterValue": "2000000",
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"BriefDescription": "Non-CISC nacro instructions decoded"
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},
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{
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"EventCode": "0xAA",
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"Counter": "0,1",
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"UMask": "0x2",
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"EventName": "MACRO_INSTS.CISC_DECODED",
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"SampleAfterValue": "2000000",
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"BriefDescription": "CISC macro instructions decoded"
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},
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{
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"EventCode": "0xAA",
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"Counter": "0,1",
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"UMask": "0x3",
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"EventName": "MACRO_INSTS.ALL_DECODED",
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"SampleAfterValue": "2000000",
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"BriefDescription": "All Instructions decoded"
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},
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{
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"EventCode": "0xA9",
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"Counter": "0,1",
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"UMask": "0x1",
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"EventName": "UOPS.MS_CYCLES",
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"SampleAfterValue": "2000000",
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"BriefDescription": "This event counts the cycles where 1 or more uops are issued by the micro-sequencer (MS), including microcode assists and inserted flows, and written to the IQ. ",
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"CounterMask": "1"
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}
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] |