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From looking at the data sheets, it is not obvious that CS# and latch clock can be treated at the same, but doing so works fine and saves the hassle of (1) trying to specify a SPI device without CS, and (2) adding another property to drive the latch clock[1]. [1]: https://lore.kernel.org/lkml/20241213-gpio74-v1-2-fa2c089caf41@posteo.net/ Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241224-gpio74-v2-3-bbcf14183191@posteo.net Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
86 lines
2.1 KiB
YAML
86 lines
2.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/fairchild,74hc595.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Generic 8-bit shift register
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description: |
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NOTE: These chips nominally don't have a chip select pin. They do however
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have a rising-edge triggered latch clock (or storage register clock) pin,
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which behaves like an active-low chip select.
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After the bits are shifted into the shift register, CS# is driven high, which
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the 74HC595 sees as a rising edge on the latch clock that results in a
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transfer of the bits from the shift register to the storage register and thus
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to the output pins.
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_ _ _ _
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shift clock ____| |_| |_..._| |_| |_________
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latch clock * trigger
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___ ________
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chip select# |___________________|
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maintainers:
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- Maxime Ripard <mripard@kernel.org>
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properties:
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compatible:
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enum:
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- fairchild,74hc595
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- nxp,74lvc594
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reg:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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description:
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The second cell is only used to specify the GPIO polarity.
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const: 2
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registers-number:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Number of daisy-chained shift registers
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enable-gpios:
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description: GPIO connected to the OE (Output Enable) pin.
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maxItems: 1
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patternProperties:
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"^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":
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type: object
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required:
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- gpio-hog
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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- registers-number
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allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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unevaluatedProperties: false
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examples:
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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gpio5: gpio5@0 {
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compatible = "fairchild,74hc595";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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registers-number = <4>;
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spi-max-frequency = <100000>;
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};
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};
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