mirror of
https://github.com/torvalds/linux.git
synced 2026-04-20 07:43:57 -04:00
7e4333567d
In BMG there are separate registers for card/platform power and energy. These are exposed through channel 0 i.e power_1/energy1_xxx. Signed-off-by: Karthik Poosa <karthik.poosa@intel.com> Reviewed-by: Badal Nilawar <badal.nilawar@intel.com> Link: https://lore.kernel.org/r/20240523144351.4040131-3-balasubramani.vivekanandan@intel.com Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529050758.442056-3-balasubramani.vivekanandan@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
29 lines
922 B
C
29 lines
922 B
C
/* SPDX-License-Identifier: MIT */
|
|
/*
|
|
* Copyright © 2024 Intel Corporation
|
|
*/
|
|
|
|
#ifndef _XE_PCODE_REGS_H_
|
|
#define _XE_PCODE_REGS_H_
|
|
|
|
#include "regs/xe_reg_defs.h"
|
|
|
|
/*
|
|
* This file contains addresses of PCODE registers visible through GT MMIO space.
|
|
*/
|
|
|
|
#define PVC_GT0_PACKAGE_ENERGY_STATUS XE_REG(0x281004)
|
|
#define PVC_GT0_PACKAGE_RAPL_LIMIT XE_REG(0x281008)
|
|
#define PVC_GT0_PACKAGE_POWER_SKU_UNIT XE_REG(0x281068)
|
|
#define PVC_GT0_PLATFORM_ENERGY_STATUS XE_REG(0x28106c)
|
|
#define PVC_GT0_PACKAGE_POWER_SKU XE_REG(0x281080)
|
|
|
|
#define BMG_PACKAGE_POWER_SKU XE_REG(0x138098)
|
|
#define BMG_PACKAGE_POWER_SKU_UNIT XE_REG(0x1380dc)
|
|
#define BMG_PACKAGE_ENERGY_STATUS XE_REG(0x138120)
|
|
#define BMG_PACKAGE_RAPL_LIMIT XE_REG(0x138440)
|
|
#define BMG_PLATFORM_ENERGY_STATUS XE_REG(0x138458)
|
|
#define BMG_PLATFORM_POWER_LIMIT XE_REG(0x138460)
|
|
|
|
#endif /* _XE_PCODE_REGS_H_ */
|