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cb794619c2
The SMC1 block on i.MX7ULP is already used as a clock provider in
imx7ulp.dtsi, but the corresponding dt-binding schema does not define
the required '#clock-cells' property. This results in CHECK_DTBS schema
validation errors.
Functionally, SMC1 controls the CPU run mode configuration:
- 00b: Normal Run (RUN)
- 10b: Very-Low-Power Run (VLPR)
- 11b: High-Speed Run (HSRUN)
These run modes determine the effective CPU operating point, and their
programming is tied to the OPP table.
Add the missing `#clock-cells` definition so the dt-binding schema is
consistent with the DTS and validates correctly.
Fixes: 8ba41d6bd9 ("dt-bindings: fsl: Convert i.MX7ULP PM to json-schema")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>