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When 'unevaluatedProperties' support is enabled, the following warnings
are generated in the mmc bindings:
Documentation/devicetree/bindings/mmc/mtk-sd.example.dt.yaml: mmc@11230000: Unevaluated properties are not allowed ('reg', 'interrupts' were unexpected)
Documentation/devicetree/bindings/mmc/sdhci-am654.example.dt.yaml: mmc@4f80000: Unevaluated properties are not allowed ('sdhci-caps-mask' was unexpected)
Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.example.dt.yaml: mmc@5a400000: Unevaluated properties are not allowed ('dma-names', 'dmas' were unexpected)
Documentation/devicetree/bindings/mmc/arm,pl18x.example.dt.yaml: mmc@80126000: Unevaluated properties are not allowed ('dmas', 'dma-names' were unexpected)
Documentation/devicetree/bindings/mmc/arasan,sdhci.example.dt.yaml: mmc@80420000: Unevaluated properties are not allowed ('resets' was unexpected)
Documentation/devicetree/bindings/mmc/arm,pl18x.example.dt.yaml: mmc@52007000: Unevaluated properties are not allowed ('interrupt-names' was unexpected)
Documentation/devicetree/bindings/clock/imx8qxp-lpcg.example.dt.yaml: mmc@5b010000: Unevaluated properties are not allowed ('power-domains' was unexpected)
Add the missing properties as necessary. For pl18x, drop interrupt-names
as there isn't any use of it when there are 2 interrupts.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Chaotian Jing <chaotian.jing@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Wenbin Mei <wenbin.mei@mediatek.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: linux-mmc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20211206174201.2297265-1-robh@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
163 lines
4.6 KiB
YAML
163 lines
4.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
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maintainers:
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- Shawn Guo <shawnguo@kernel.org>
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allOf:
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- $ref: "mmc-controller.yaml"
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description: |
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The Enhanced Secure Digital Host Controller on Freescale i.MX family
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provides an interface for MMC, SD, and SDIO types of memory cards.
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This file documents differences between the core properties described
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by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
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properties:
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compatible:
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oneOf:
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- enum:
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- fsl,imx25-esdhc
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- fsl,imx35-esdhc
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- fsl,imx51-esdhc
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- fsl,imx53-esdhc
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- fsl,imx6q-usdhc
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- fsl,imx6sl-usdhc
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- fsl,imx6sll-usdhc
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- fsl,imx6sx-usdhc
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- fsl,imx6ull-usdhc
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- fsl,imx7d-usdhc
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- fsl,imx7ulp-usdhc
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- fsl,imxrt1050-usdhc
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- nxp,s32g2-usdhc
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- items:
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- enum:
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- fsl,imx8mm-usdhc
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- fsl,imx8mn-usdhc
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- fsl,imx8mp-usdhc
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- fsl,imx8mq-usdhc
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- fsl,imx8qm-usdhc
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- fsl,imx8qxp-usdhc
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- const: fsl,imx7d-usdhc
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- items:
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- enum:
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- fsl,imx8ulp-usdhc
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- const: fsl,imx8mm-usdhc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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fsl,wp-controller:
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description: |
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boolean, if present, indicate to use controller internal write protection.
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type: boolean
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fsl,delay-line:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Specify the number of delay cells for override mode.
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This is used to set the clock delay for DLL(Delay Line) on override mode
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to select a proper data sampling window in case the clock quality is not good
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due to signal path is too long on the board. Please refer to eSDHC/uSDHC
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chapter, DLL (Delay Line) section in RM for details.
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default: 0
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voltage-ranges:
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$ref: '/schemas/types.yaml#/definitions/uint32-matrix'
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description: |
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Specify the voltage range in case there are software transparent level
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shifters on the outputs of the controller. Two cells are required, first
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cell specifies minimum slot voltage (mV), second cell specifies maximum
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slot voltage (mV).
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items:
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items:
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- description: value for minimum slot voltage
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- description: value for maximum slot voltage
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maxItems: 1
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fsl,tuning-start-tap:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Specify the start delay cell point when send first CMD19 in tuning procedure.
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default: 0
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fsl,tuning-step:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Specify the increasing delay cell steps in tuning procedure.
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The uSDHC use one delay cell as default increasing step to do tuning process.
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This property allows user to change the tuning step to more than one delay
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cells which is useful for some special boards or cards when the default
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tuning step can't find the proper delay window within limited tuning retries.
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default: 0
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fsl,strobe-dll-delay-target:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Specify the strobe dll control slave delay target.
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This delay target programming host controller loopback read clock, and this
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property allows user to change the delay target for the strobe input read clock.
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If not use this property, driver default set the delay target to value 7.
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Only eMMC HS400 mode need to take care of this property.
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default: 0
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clocks:
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maxItems: 3
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description:
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Handle clocks for the sdhc controller.
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clock-names:
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items:
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- const: ipg
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- const: ahb
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- const: per
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power-domains:
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maxItems: 1
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pinctrl-names:
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oneOf:
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- minItems: 3
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items:
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- const: default
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- const: state_100mhz
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- const: state_200mhz
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- const: sleep
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- minItems: 1
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items:
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- const: default
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- const: sleep
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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mmc@70004000 {
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compatible = "fsl,imx51-esdhc";
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reg = <0x70004000 0x4000>;
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interrupts = <1>;
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fsl,wp-controller;
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};
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mmc@70008000 {
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compatible = "fsl,imx51-esdhc";
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reg = <0x70008000 0x4000>;
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interrupts = <2>;
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cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
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wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
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};
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