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With 'unevaluatedProperties' support implemented, there's a number of
warnings from the Designware PCIe based bindings:
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.example.dt.yaml: pcie@1ffc000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'device_type', 'bus-range', 'ranges', '#interrupt-cells', 'interrupt-map-mask', 'interrupt-map' were unexpected)
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.example.dt.yaml: pcie@1ffc000: Unevaluated properties are not allowed ('clock-names' was unexpected)
Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f4000000: Unevaluated properties are not allowed ('bus-range', '#address-cells', '#size-cells', 'device_type', 'ranges', 'num-lanes', '#interrupt-cells', 'interrupts', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'clocks', 'clock-names' were unexpected)
Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f4000000: Unevaluated properties are not allowed ('clock-names' was unexpected)
Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f5000000: Unevaluated properties are not allowed ('bus-range', '#address-cells', '#size-cells', 'device_type', 'phys', 'ranges', 'num-lanes', '#interrupt-cells', 'interrupts', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'reset-gpios', 'pcie@0,0' were unexpected)
Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f5000000: Unevaluated properties are not allowed ('phys', 'hisilicon,clken-gpios' were unexpected)
Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie@d0e00000: Unevaluated properties are not allowed ('device_type', '#address-cells', '#size-cells', 'linux,pci-domain', 'bus-range', '#interrupt-cells', 'interrupt-map-mask', 'interrupt-map' were unexpected)
Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie@d0e00000: Unevaluated properties are not allowed ('resets', 'phys', 'phy-names', 'reset-assert-ms' were unexpected)
Documentation/devicetree/bindings/pci/rockchip-dw-pcie.example.dt.yaml: pcie@fe280000: Unevaluated properties are not allowed ('clock-names', 'msi-map', 'phys', 'phy-names', 'power-domains', 'resets', 'reset-names' were unexpected)
Documentation/devicetree/bindings/pci/samsung,exynos-pcie.example.dt.yaml: pcie@15700000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', '#interrupt-cells', 'device_type', 'bus-range', 'ranges', 'interrupt-map-mask', 'interrupt-map' were unexpected)
Documentation/devicetree/bindings/pci/samsung,exynos-pcie.example.dt.yaml: pcie@15700000: Unevaluated properties are not allowed ('clock-names', 'phys', 'vdd10-supply', 'vdd18-supply' were unexpected)
Documentation/devicetree/bindings/pci/sifive,fu740-pcie.example.dt.yaml: pcie@e00000000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', '#interrupt-cells', 'device_type', 'dma-coherent', 'bus-range', 'ranges', 'interrupts', 'interrupt-parent', 'interrupt-map-mask', 'interrupt-map', 'clock-names', 'clocks' were unexpected)
Documentation/devicetree/bindings/pci/sifive,fu740-pcie.example.dt.yaml: pcie@e00000000: Unevaluated properties are not allowed ('dma-coherent', 'clock-names', 'resets', 'pwren-gpios' were unexpected)
Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.example.dt.yaml: pcie-ep@66000000: Unevaluated properties are not allowed ('clock-names', 'clocks', 'reset-names', 'resets', 'phy-names', 'phys' were unexpected)
Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.example.dt.yaml: pcie@28400000: Unevaluated properties are not allowed ('clock-names' was unexpected)
Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.example.dt.yaml: pcie@28400000: Unevaluated properties are not allowed ('device_type', 'bus-range', 'num-viewport', '#address-cells', '#size-cells', '#interrupt-cells', 'ranges', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'max-link-speed' were unexpected)
The main problem is that snps,dw-pcie.yaml and snps,dw-pcie-ep.yaml
shouldn't set 'unevaluatedProperties: false'. Otherwise, bindings that
reference them cannot add additional properties. With that addressed,
there's a handful of other undocumented properties to add.
Cc: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Binghui Wang <wangbinghui@hisilicon.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Greentime Hu <greentime.hu@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211206194426.2470080-1-robh@kernel.org
103 lines
2.5 KiB
YAML
103 lines
2.5 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys DesignWare PCIe interface
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maintainers:
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- Jingoo Han <jingoohan1@gmail.com>
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- Gustavo Pimentel <gustavo.pimentel@synopsys.com>
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description: |
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Synopsys DesignWare PCIe host controller
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allOf:
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- $ref: /schemas/pci/pci-bus.yaml#
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properties:
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compatible:
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anyOf:
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- {}
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- const: snps,dw-pcie
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reg:
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description: |
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It should contain Data Bus Interface (dbi) and config registers for all
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versions.
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For designware core version >= 4.80, it may contain ATU address space.
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minItems: 2
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maxItems: 5
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reg-names:
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minItems: 2
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maxItems: 5
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items:
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enum: [ dbi, dbi2, config, atu, app, elbi, mgmt, ctrl, parf, cfg, link,
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ulreg, smu, mpu, apb, phy ]
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num-lanes:
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description: |
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number of lanes to use (this property should be specified unless
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the link is brought already up in firmware)
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maximum: 16
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reset-gpio:
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description: GPIO pin number of PERST# signal
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maxItems: 1
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deprecated: true
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reset-gpios:
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description: GPIO controlled connection to PERST# signal
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maxItems: 1
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interrupts: true
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interrupt-names: true
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clocks: true
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snps,enable-cdm-check:
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type: boolean
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description: |
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This is a boolean property and if present enables
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automatic checking of CDM (Configuration Dependent Module) registers
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for data corruption. CDM registers include standard PCIe configuration
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space registers, Port Logic registers, DMA and iATU (internal Address
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Translation Unit) registers.
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num-viewport:
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description: |
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number of view ports configured in hardware. If a platform
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does not specify it, the driver autodetects it.
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deprecated: true
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additionalProperties: true
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required:
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- reg
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- reg-names
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- compatible
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examples:
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- |
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bus {
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#address-cells = <1>;
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#size-cells = <1>;
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pcie@dfc00000 {
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device_type = "pci";
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compatible = "snps,dw-pcie";
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reg = <0xdfc00000 0x0001000>, /* IP registers */
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<0xd0000000 0x0002000>; /* Configuration space */
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reg-names = "dbi", "config";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000>,
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<0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
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interrupts = <25>, <24>;
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#interrupt-cells = <1>;
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num-lanes = <1>;
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};
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};
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