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This patch adds YAML schema for DT bindings of few AHUB modules. These devices will be registered as ASoC components and bindings will be used on Tegra210 and later chips. The bindings for below mentioned modules are added: * SFC (Sampling Frequency Converter) * MVC (Master Volume Control) * AMX (Audio Multiplexer) * ADX (Audio Demultiplexer) * Mixer Signed-off-by: Sameer Pujar <spujar@nvidia.com> Cc: Rob Herring <robh+dt@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1631551342-25469-5-git-send-email-spujar@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
188 lines
4.7 KiB
YAML
188 lines
4.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Tegra210 AHUB Device Tree Bindings
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description: |
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The Audio Hub (AHUB) comprises a collection of hardware accelerators
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for audio pre-processing, post-processing and a programmable full
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crossbar for routing audio data across these accelerators. It has
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external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
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engine through ADMAIF.
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maintainers:
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- Jon Hunter <jonathanh@nvidia.com>
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- Sameer Pujar <spujar@nvidia.com>
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properties:
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$nodename:
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pattern: "^ahub@[0-9a-f]*$"
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compatible:
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oneOf:
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- enum:
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- nvidia,tegra210-ahub
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- nvidia,tegra186-ahub
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- items:
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- const: nvidia,tegra194-ahub
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- const: nvidia,tegra186-ahub
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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const: ahub
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assigned-clocks:
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maxItems: 1
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assigned-clock-parents:
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maxItems: 1
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assigned-clock-rates:
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maxItems: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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ranges: true
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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description: |
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Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub).
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These are connected to ACIF interfaces of AHUB clients. Thus the
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number of port nodes depend on the number of clients that AHUB may
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have depending on the SoC revision.
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patternProperties:
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'^port@[0-9]':
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$ref: audio-graph-port.yaml#
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unevaluatedProperties: false
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patternProperties:
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'^i2s@[0-9a-f]+$':
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type: object
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'^dmic@[0-9a-f]+$':
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type: object
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$ref: nvidia,tegra210-dmic.yaml#
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'^admaif@[0-9a-f]+$':
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type: object
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$ref: nvidia,tegra210-admaif.yaml#
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'^dspk@[0-9a-f]+$':
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type: object
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$ref: nvidia,tegra186-dspk.yaml#
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'^mvc@[0-9a-f]+$':
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type: object
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$ref: nvidia,tegra210-mvc.yaml#
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'^sfc@[0-9a-f]+$':
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type: object
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$ref: nvidia,tegra210-sfc.yaml#
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'^amx@[0-9a-f]+$':
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type: object
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$ref: nvidia,tegra210-amx.yaml#
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'^adx@[0-9a-f]+$':
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type: object
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$ref: nvidia,tegra210-adx.yaml#
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'^amixer@[0-9a-f]+$':
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type: object
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$ref: nvidia,tegra210-mixer.yaml#
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- assigned-clocks
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- assigned-clock-parents
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- "#address-cells"
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- "#size-cells"
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- ranges
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additionalProperties: false
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examples:
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- |
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#include<dt-bindings/clock/tegra210-car.h>
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ahub@702d0800 {
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compatible = "nvidia,tegra210-ahub";
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reg = <0x702d0800 0x800>;
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clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
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clock-names = "ahub";
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assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
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assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x702d0000 0x702d0000 0x0000e400>;
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// All AHUB child nodes below
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admaif@702d0000 {
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compatible = "nvidia,tegra210-admaif";
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reg = <0x702d0000 0x800>;
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dmas = <&adma 1>, <&adma 1>,
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<&adma 2>, <&adma 2>,
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<&adma 3>, <&adma 3>,
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<&adma 4>, <&adma 4>,
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<&adma 5>, <&adma 5>,
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<&adma 6>, <&adma 6>,
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<&adma 7>, <&adma 7>,
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<&adma 8>, <&adma 8>,
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<&adma 9>, <&adma 9>,
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<&adma 10>, <&adma 10>;
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dma-names = "rx1", "tx1",
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"rx2", "tx2",
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"rx3", "tx3",
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"rx4", "tx4",
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"rx5", "tx5",
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"rx6", "tx6",
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"rx7", "tx7",
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"rx8", "tx8",
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"rx9", "tx9",
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"rx10", "tx10";
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};
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i2s@702d1000 {
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compatible = "nvidia,tegra210-i2s";
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reg = <0x702d1000 0x100>;
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clocks = <&tegra_car TEGRA210_CLK_I2S0>;
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clock-names = "i2s";
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assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
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assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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assigned-clock-rates = <1536000>;
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sound-name-prefix = "I2S1";
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};
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dmic@702d4000 {
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compatible = "nvidia,tegra210-dmic";
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reg = <0x702d4000 0x100>;
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clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
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clock-names = "dmic";
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assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
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assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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assigned-clock-rates = <3072000>;
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sound-name-prefix = "DMIC1";
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};
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// More child nodes to follow
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};
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...
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