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c0fb59a4c3
This change adds renoir hw_seq, needed to do renoir specific hw programing Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
123 lines
3.9 KiB
C
123 lines
3.9 KiB
C
/*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dm_services.h"
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#include "dm_helpers.h"
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#include "core_types.h"
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#include "resource.h"
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#include "dce/dce_hwseq.h"
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#include "dcn20/dcn20_hwseq.h"
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#include "vmid.h"
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#include "reg_helper.h"
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#include "hw/clk_mgr.h"
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#define DC_LOGGER_INIT(logger)
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#define CTX \
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hws->ctx
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#define REG(reg)\
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hws->regs->reg
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#undef FN
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#define FN(reg_name, field_name) \
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hws->shifts->field_name, hws->masks->field_name
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/* Temporary read settings, future will get values from kmd directly */
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static void mmhub_update_page_table_config(struct dcn_hubbub_phys_addr_config *config,
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struct dce_hwseq *hws)
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{
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uint32_t page_table_base_hi;
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uint32_t page_table_base_lo;
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REG_GET(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
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PAGE_DIRECTORY_ENTRY_HI32, &page_table_base_hi);
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REG_GET(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
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PAGE_DIRECTORY_ENTRY_LO32, &page_table_base_lo);
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config->gart_config.page_table_base_addr = ((uint64_t)page_table_base_hi << 32) | page_table_base_lo;
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}
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static int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config)
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{
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struct dcn_hubbub_phys_addr_config config;
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config.system_aperture.fb_top = pa_config->system_aperture.fb_top;
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config.system_aperture.fb_offset = pa_config->system_aperture.fb_offset;
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config.system_aperture.fb_base = pa_config->system_aperture.fb_base;
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config.system_aperture.agp_top = pa_config->system_aperture.agp_top;
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config.system_aperture.agp_bot = pa_config->system_aperture.agp_bot;
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config.system_aperture.agp_base = pa_config->system_aperture.agp_base;
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config.gart_config.page_table_start_addr = pa_config->gart_config.page_table_start_addr;
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config.gart_config.page_table_end_addr = pa_config->gart_config.page_table_end_addr;
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config.gart_config.page_table_base_addr = pa_config->gart_config.page_table_base_addr;
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mmhub_update_page_table_config(&config, hws);
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return dc->res_pool->hubbub->funcs->init_dchub_sys_ctx(dc->res_pool->hubbub, &config);
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}
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// work around for Renoir s0i3, if register is programmed, bypass golden init.
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static bool dcn21_s0i3_golden_init_wa(struct dc *dc)
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{
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struct dce_hwseq *hws = dc->hwseq;
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uint32_t value = 0;
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value = REG_READ(MICROSECOND_TIME_BASE_DIV);
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return value != 0x00120464;
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}
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void dcn21_exit_optimized_pwr_state(
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const struct dc *dc,
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struct dc_state *context)
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{
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dc->clk_mgr->funcs->update_clocks(
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dc->clk_mgr,
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context,
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false);
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}
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void dcn21_optimize_pwr_state(
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const struct dc *dc,
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struct dc_state *context)
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{
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dc->clk_mgr->funcs->update_clocks(
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dc->clk_mgr,
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context,
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true);
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}
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void dcn21_hw_sequencer_construct(struct dc *dc)
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{
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dcn20_hw_sequencer_construct(dc);
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dc->hwss.init_sys_ctx = dcn21_init_sys_ctx;
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dc->hwss.s0i3_golden_init_wa = dcn21_s0i3_golden_init_wa;
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dc->hwss.optimize_pwr_state = dcn21_optimize_pwr_state;
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dc->hwss.exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state;
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}
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