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Document the device tree bindings for UFS host controller on Qualcomm SA8255P platform which integrates firmware-managed resources. The platform firmware implements the SCMI server and manages resources such as the PHY, clocks, regulators and resets via the SCMI power protocol. As a result, the OS-visible DT only describes the controller’s MMIO, interrupt, IOMMU and power-domain interfaces. The generic "qcom,ufshc" and "jedec,ufs-2.0" compatible strings are removed from the binding, since this firmware managed design won't be compatible with the drivers doing full resource management. Co-developed-by: Anjana Hari <anjana.hari@oss.qualcomm.com> Signed-off-by: Anjana Hari <anjana.hari@oss.qualcomm.com> Signed-off-by: Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20260113080046.284089-3-ram.dwivedi@oss.qualcomm.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
57 lines
1.0 KiB
YAML
57 lines
1.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ufs/qcom,sa8255p-ufshc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SA8255P UFS Host Controller
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maintainers:
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- Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com>
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properties:
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compatible:
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const: qcom,sa8255p-ufshc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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iommus:
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maxItems: 1
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dma-coherent: true
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- power-domains
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- iommus
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- dma-coherent
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allOf:
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- $ref: ufs-common.yaml
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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ufshc@1d84000 {
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compatible = "qcom,sa8255p-ufshc";
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reg = <0x01d84000 0x3000>;
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interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
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lanes-per-direction = <2>;
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iommus = <&apps_smmu 0x100 0x0>;
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power-domains = <&scmi3_pd 0>;
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dma-coherent;
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};
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