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This DMA controller appears in Loongson-2K0300 and Loongson-2K3000. It is a chain multi-channel controller that enables data transfers from memory to memory, device to memory, and memory to device, as well as channel prioritization configurable through the channel configuration registers. In addition, there are slight differences between Loongson-2K0300 and Loongson-2K3000, such as channel register offsets and the number of channels. Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Link: https://patch.msgid.link/73bc32ba6249f1eef94fec9b349bc9efa98278ea.1772853681.git.zhoubinbin@loongson.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
42 lines
1.3 KiB
Plaintext
42 lines
1.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# Loongson DMA controllers drivers
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#
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if MACH_LOONGSON32 || MACH_LOONGSON64 || COMPILE_TEST
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config LOONGSON1_APB_DMA
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tristate "Loongson1 APB DMA support"
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depends on MACH_LOONGSON32 || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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This selects support for the APB DMA controller in Loongson1 SoCs,
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which is required by Loongson1 NAND and audio support.
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config LOONGSON2_APB_DMA
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tristate "Loongson2 APB DMA support"
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depends on MACH_LOONGSON64 || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support for the Loongson2 APB DMA controller driver. The
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DMA controller is having single DMA channel which can be
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configured for different peripherals like audio, nand, sdio
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etc which is in APB bus.
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This DMA controller transfers data from memory to peripheral fifo.
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It does not support memory to memory data transfer.
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config LOONGSON2_APB_CMC_DMA
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tristate "Loongson2 Chain Multi-Channel DMA support"
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depends on MACH_LOONGSON64 || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support for the Loongson Chain Multi-Channel DMA controller driver.
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It is discovered on the Loongson-2K chip (Loongson-2K0300/Loongson-2K3000),
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which has 4/8 channels internally, enabling bidirectional data transfer
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between devices and memory.
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endif
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