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Convert the Intel Stratix 10 clock controller bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
36 lines
673 B
YAML
36 lines
673 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/intel,stratix10.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel SoCFPGA Stratix10 platform clock controller binding
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maintainers:
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- Dinh Nguyen <dinguyen@kernel.org>
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properties:
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compatible:
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const: intel,stratix10-clkmgr
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'#clock-cells':
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const: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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clock-controller@ffd10000 {
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compatible = "intel,stratix10-clkmgr";
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reg = <0xffd10000 0x1000>;
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#clock-cells = <1>;
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};
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