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1d9a770bc8
Convert the QEMU fw-cfg binding to DT schema format. As this binding is also used on Risc-V now, drop any architecture references and move to a common location. The fw-cfg interface has also gained some DMA support which is coherent, so add the missing 'dma-coherent'. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Link: https://lore.kernel.org/r/20220310013552.549590-1-robh@kernel.org
55 lines
1.4 KiB
YAML
55 lines
1.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/firmware/qemu,fw-cfg-mmio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: QEMU Firmware Configuration bindings
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maintainers:
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- Rob Herring <robh@kernel.org>
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description: |
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Various QEMU emulation / virtualization targets provide the following
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Firmware Configuration interface on the "virt" machine type:
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- A write-only, 16-bit wide selector (or control) register,
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- a read-write, 64-bit wide data register.
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QEMU exposes the control and data register to guests as memory mapped
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registers; their location is communicated to the guest's UEFI firmware in the
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DTB that QEMU places at the bottom of the guest's DRAM.
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The authoritative guest-side hardware interface documentation to the fw_cfg
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device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree.
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properties:
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compatible:
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const: qemu,fw-cfg-mmio
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reg:
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maxItems: 1
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description: |
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* Bytes 0x0 to 0x7 cover the data register.
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* Bytes 0x8 to 0x9 cover the selector register.
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* Further registers may be appended to the region in case of future interface
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revisions / feature bits.
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dma-coherent: true
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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fw-cfg@9020000 {
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compatible = "qemu,fw-cfg-mmio";
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reg = <0x9020000 0xa>;
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};
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...
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