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Pull devicetree updates from Rob Herring: - Add Krzysztof Kozlowski as co-maintainer for DT bindings providing much needed help. - DT schema validation now takes DTB files as input rather than intermediate YAML files. This decouples the validation from the source level syntax information. There's a bunch of schema fixes as a result of switching to DTB based validation which exposed some errors and incomplete schemas and examples. - Kbuild improvements to explicitly warn users running 'make dt_binding_check' on missing yamllint - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename or path instead of the full path to 1 file. - Convert various bindings to schema format: mscc,vsc7514-switch, multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma, msm/mdp4, rda,8810pl-uart - New schemas for u-boot environment variable partition, TI clksel - New compatible strings for Renesas RZ/V2L SoC - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon - Add/fix schemas for QEMU Arm 'virt' machine - Drop unused of_alias_get_alias_list() function - Add a script to check DT unittest EXPECT message output. Pass messages also now print by default at PR_INFO level to help test automation. * tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits) dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable dt-bindings: nvmem: add U-Boot environment variables binding dt-bindings: ufs: qcom: Add SM6350 compatible string dt-bindings: dmaengine: sifive,fu540-c000: include generic schema dt-bindings: gpio: pca95xx: drop useless consumer example Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs" dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent' dt-bindings: gnss: Add two more chips dt-bindings: gnss: Rewrite sirfstar binding in YAML dt-bindings: gnss: Modify u-blox to use common bindings dt-bindings: gnss: Rewrite common bindings in YAML dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible dt-bindings: ata: ahci-platform: Add power-domains property dt-bindings: ata: ahci-platform: Convert DT bindings to yaml dt-bindings: kbuild: Use DTB files for validation dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate dt-bindings: Add QEMU virt machine compatible dt-bindings: arm: Convert QEMU fw-cfg to DT schema dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list dt-bindings: i2c: convert i2c-at91 to json-schema ...
183 lines
4.7 KiB
YAML
183 lines
4.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car CAN FD Controller
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maintainers:
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- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
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allOf:
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- $ref: can-controller.yaml#
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,r8a774a1-canfd # RZ/G2M
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- renesas,r8a774b1-canfd # RZ/G2N
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- renesas,r8a774c0-canfd # RZ/G2E
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- renesas,r8a774e1-canfd # RZ/G2H
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- renesas,r8a7795-canfd # R-Car H3
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- renesas,r8a7796-canfd # R-Car M3-W
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- renesas,r8a77965-canfd # R-Car M3-N
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- renesas,r8a77970-canfd # R-Car V3M
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- renesas,r8a77980-canfd # R-Car V3H
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- renesas,r8a77990-canfd # R-Car E3
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- renesas,r8a77995-canfd # R-Car D3
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- const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
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- items:
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- enum:
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- renesas,r9a07g044-canfd # RZ/G2{L,LC}
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- renesas,r9a07g054-canfd # RZ/V2L
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- const: renesas,rzg2l-canfd # RZ/G2L family
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- const: renesas,r8a779a0-canfd # R-Car V3U
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reg:
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maxItems: 1
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interrupts: true
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: fck
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- const: canfd
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- const: can_clk
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power-domains:
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maxItems: 1
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resets: true
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renesas,no-can-fd:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The controller can operate in either CAN FD only mode (default) or
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Classical CAN only mode. The mode is global to both the channels.
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Specify this property to put the controller in Classical CAN only mode.
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assigned-clocks:
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description:
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Reference to the CANFD clock. The CANFD clock is a div6 clock and can be
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used by both CAN (if present) and CAN FD controllers at the same time.
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It needs to be scaled to maximum frequency if any of these controllers
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use it.
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assigned-clock-rates:
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description: Maximum frequency of the CANFD clock.
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patternProperties:
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"^channel[01]$":
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type: object
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description:
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The controller supports two channels and each is represented as a child
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node. Each child node supports the "status" property only, which
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is used to enable/disable the respective channel.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- power-domains
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- resets
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- assigned-clocks
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- assigned-clock-rates
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- channel0
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- channel1
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if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rzg2l-canfd
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then:
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properties:
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interrupts:
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items:
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- description: CAN global error interrupt
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- description: CAN receive FIFO interrupt
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- description: CAN0 error interrupt
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- description: CAN0 transmit interrupt
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- description: CAN0 transmit/receive FIFO receive completion interrupt
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- description: CAN1 error interrupt
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- description: CAN1 transmit interrupt
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- description: CAN1 transmit/receive FIFO receive completion interrupt
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interrupt-names:
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items:
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- const: g_err
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- const: g_recc
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- const: ch0_err
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- const: ch0_rec
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- const: ch0_trx
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- const: ch1_err
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- const: ch1_rec
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- const: ch1_trx
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resets:
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maxItems: 2
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reset-names:
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items:
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- const: rstp_n
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- const: rstc_n
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required:
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- interrupt-names
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- reset-names
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else:
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properties:
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interrupts:
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items:
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- description: Channel interrupt
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- description: Global interrupt
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interrupt-names:
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items:
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- const: ch_int
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- const: g_int
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resets:
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maxItems: 1
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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canfd: can@e66c0000 {
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compatible = "renesas,r8a7795-canfd",
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"renesas,rcar-gen3-canfd";
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reg = <0xe66c0000 0x8000>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 914>,
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<&cpg CPG_CORE R8A7795_CLK_CANFD>,
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<&can_clk>;
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clock-names = "fck", "canfd", "can_clk";
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assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
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assigned-clock-rates = <40000000>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 914>;
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channel0 {
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};
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channel1 {
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};
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};
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