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Some SPI-NAND chips do not support on-die ECC. For these chips, correction must apply on the SPI controller end. In order to avoid doing all the calculations by software, Macronix provides a specific engine that can offload the intensive work. Add Macronix ECC engine support, this engine can work in conjunction with a SPI controller and a raw NAND controller, it can be pipelined or external and supports linear and syndrome layouts. Right now the simplest configuration is supported: SPI controller external and linear ECC engine. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-15-miquel.raynal@bootlin.com
14 lines
366 B
Makefile
14 lines
366 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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nandcore-objs := core.o bbt.o
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obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
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obj-y += onenand/
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obj-y += raw/
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obj-y += spi/
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nandcore-$(CONFIG_MTD_NAND_ECC) += ecc.o
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nandcore-$(CONFIG_MTD_NAND_ECC_SW_HAMMING) += ecc-sw-hamming.o
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nandcore-$(CONFIG_MTD_NAND_ECC_SW_BCH) += ecc-sw-bch.o
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nandcore-$(CONFIG_MTD_NAND_ECC_MXIC) += ecc-mxic.o
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