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This adds a YAML description of the smpctrl node needed by the platform code for the MStar/SigmaStar Armv7 SoCs to boot secondary cpus. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20201201134330.3037007-2-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
41 lines
939 B
YAML
41 lines
939 B
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2020 thingy.jp.
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: MStar/SigmaStar Armv7 SoC SMP control registers
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maintainers:
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- Daniel Palmer <daniel@thingy.jp>
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description: |
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MStar/SigmaStar's Armv7 SoCs that have more than one processor
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have a region of registers that allow setting the boot address
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and a magic number that allows secondary processors to leave
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the loop they are parked in by the boot ROM.
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properties:
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compatible:
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items:
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- enum:
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- sstar,ssd201-smpctrl # SSD201/SSD202D
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- const: mstar,smpctrl
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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smpctrl@204000 {
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compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl";
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reg = <0x204000 0x200>;
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};
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