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Update binding docs for devices which are part of APE subsystem on Tegra234 chip. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Link: https://lore.kernel.org/r/1643373476-8538-4-git-send-email-spujar@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
84 lines
1.8 KiB
YAML
84 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra ACONNECT Bus
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description: |
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The Tegra ACONNECT bus is an AXI switch which is used to connnect various
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components inside the Audio Processing Engine (APE). All CPU accesses to
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the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
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devices accessed via the ACONNNECT are described by child-nodes.
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maintainers:
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- Jon Hunter <jonathanh@nvidia.com>
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properties:
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compatible:
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oneOf:
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- const: nvidia,tegra210-aconnect
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- items:
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- enum:
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- nvidia,tegra234-aconnect
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- nvidia,tegra186-aconnect
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- nvidia,tegra194-aconnect
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- const: nvidia,tegra210-aconnect
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clocks:
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items:
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- description: Must contain the entry for APE clock
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- description: Must contain the entry for APE interface clock
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clock-names:
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items:
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- const: ape
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- const: apb2ape
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power-domains:
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maxItems: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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ranges: true
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patternProperties:
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"@[0-9a-f]+$":
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type: object
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required:
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- compatible
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- clocks
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- clock-names
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- power-domains
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- "#address-cells"
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- "#size-cells"
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- ranges
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additionalProperties: false
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examples:
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- |
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#include<dt-bindings/clock/tegra210-car.h>
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aconnect@702c0000 {
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compatible = "nvidia,tegra210-aconnect";
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clocks = <&tegra_car TEGRA210_CLK_APE>,
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<&tegra_car TEGRA210_CLK_APB2APE>;
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clock-names = "ape", "apb2ape";
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power-domains = <&pd_audio>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x702c0000 0x702c0000 0x00040000>;
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// Child device nodes follow ...
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};
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...
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