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c6a43fb348
My professional e-mail will change and the BayLibre one will bounce after mid-september of 2022. This updates the MAINTAINERS file, the YAML bindings and adds an entry in the .mailmap file. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220816095617.948678-1-narmstrong@baylibre.com
55 lines
1.2 KiB
YAML
55 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 BayLibre, SAS
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Amlogic Meson SPI Flash Controller
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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allOf:
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- $ref: "spi-controller.yaml#"
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description: |
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The Meson SPIFC is a controller optimized for communication with SPI
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NOR memories, without DMA support and a 64-byte unified transmit /
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receive buffer.
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properties:
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compatible:
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enum:
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- amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs
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- amlogic,meson-gxbb-spifc # SPI Flash Controller on GXBB and compatible SoCs
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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spi@c1108c80 {
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compatible = "amlogic,meson6-spifc";
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reg = <0xc1108c80 0x80>;
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clocks = <&clk81>;
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#address-cells = <1>;
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#size-cells = <0>;
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flash: flash@0 {
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compatible = "spansion,m25p80", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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};
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