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According to the commit log of the commit 3ac395a5b3 ("ARM: dts:
bcm283x: Use firmware PM driver for V3D"), the initial intent behind the
bcm2835-rpi-common DTSI was to share data between the RaspberryPies
based on the BCM2835, 36 and 37.
However, it was included by these SoCs' main DTSI. This is creating an
improper layering.
On top of that, bcm2835.dtsi is being included by bcm2711.dtsi, which
means that, even though the bcm2835-rpi-common DTSI wasn't actually
meant to contain data for the BCM2711, it actually leaks into the
BCM2711 DTSI.
In order to remove both issues, let's remove the include of
bcm2835-rpi-common.dtsi from bcm283{5-7}.dtsi and put them into the
bcm283{6,7}-rpi.dtsi.
BCM2835 has to be handled with special care due to the fact that
bcm2835.dtsi is being included by bcm2711.dtsi. Thus, we chose to
include bcm2835-rpi-common.dtsi directly into the board DTS. This will
be more error-prone, but given that it's a fairly old SoC by now, the
chance that we will get more BCM2835 boards is fairly low.
BCM2711 isn't modified since the content of bcm2835-rpi-common.dtsi was
only a power-domain for the v3d that was overridden anyway.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221026-rpi-display-fw-clk-v1-1-5c29b7a3d8b0@cerno.tech
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
55 lines
1.3 KiB
Plaintext
55 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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#include "bcm283x.dtsi"
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#include "bcm2835-common.dtsi"
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/ {
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compatible = "brcm,bcm2835";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,arm1176jzf-s";
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reg = <0x0>;
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/* Source for d/i-cache-line-size and d/i-cache-sets
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* https://developer.arm.com/documentation/ddi0301
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* /h/level-one-memory-system/cache-organization?lang=en
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*
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* Source for d/i-cache-size
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* https://forums.raspberrypi.com/viewtopic.php?t=98428
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*
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* NOTE: The BCM2835 has a L2 cache but it is dedicated to the GPU
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* It can be shared with the CPU through fw settings,
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* but this is not recommended.
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*/
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d-cache-size = <0x4000>;
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d-cache-line-size = <16>;
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d-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set
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i-cache-size = <0x4000>;
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i-cache-line-size = <16>;
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i-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set
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};
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};
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soc {
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ranges = <0x7e000000 0x20000000 0x02000000>;
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dma-ranges = <0x40000000 0x00000000 0x20000000>;
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};
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arm-pmu {
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compatible = "arm,arm1176-pmu";
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};
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};
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&cpu_thermal {
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coefficients = <(-538) 407000>;
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};
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/* enable thermal sensor with the correct compatible property set */
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&thermal {
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compatible = "brcm,bcm2835-thermal";
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status = "okay";
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};
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