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When the driver starts the device, it enables all the necessary interrupts. However interrupts associated to host rings are enabled by default on all GEN2 devices (except for dh895x) even when SR-IOV is active. Fix this behaviour by checking if data structures associated to VFs have been allocated to determine whether to enable such interrupts or not. Since the logic for the fix is the same across GEN2 devices, replace the function to be fixed (adf_enable_ints()) with a single one (adf_gen2_enable_ints()) in the common GEN2 code in adf_gen2_hw_data.c. Likewise, remove the unnecessary duplication of defines too. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
40 lines
1.5 KiB
C
40 lines
1.5 KiB
C
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
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/* Copyright(c) 2014 - 2020 Intel Corporation */
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#ifndef ADF_DH895x_HW_DATA_H_
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#define ADF_DH895x_HW_DATA_H_
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/* PCIe configuration space */
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#define ADF_DH895XCC_SRAM_BAR 0
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#define ADF_DH895XCC_PMISC_BAR 1
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#define ADF_DH895XCC_ETR_BAR 2
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#define ADF_DH895XCC_FUSECTL_SKU_MASK 0x300000
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#define ADF_DH895XCC_FUSECTL_SKU_SHIFT 20
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#define ADF_DH895XCC_FUSECTL_SKU_1 0x0
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#define ADF_DH895XCC_FUSECTL_SKU_2 0x1
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#define ADF_DH895XCC_FUSECTL_SKU_3 0x2
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#define ADF_DH895XCC_FUSECTL_SKU_4 0x3
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#define ADF_DH895XCC_MAX_ACCELERATORS 6
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#define ADF_DH895XCC_MAX_ACCELENGINES 12
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#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 13
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#define ADF_DH895XCC_ACCELERATORS_MASK 0x3F
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#define ADF_DH895XCC_ACCELENGINES_MASK 0xFFF
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#define ADF_DH895XCC_ETR_MAX_BANKS 32
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/* Masks for VF2PF interrupts */
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#define ADF_DH895XCC_ERR_REG_VF2PF_L(vf_src) (((vf_src) & 0x01FFFE00) >> 9)
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#define ADF_DH895XCC_ERR_MSK_VF2PF_L(vf_mask) (((vf_mask) & 0xFFFF) << 9)
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#define ADF_DH895XCC_ERR_REG_VF2PF_U(vf_src) (((vf_src) & 0x0000FFFF) << 16)
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#define ADF_DH895XCC_ERR_MSK_VF2PF_U(vf_mask) ((vf_mask) >> 16)
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/* AE to function mapping */
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#define ADF_DH895XCC_AE2FUNC_MAP_GRP_A_NUM_REGS 96
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#define ADF_DH895XCC_AE2FUNC_MAP_GRP_B_NUM_REGS 12
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/* FW names */
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#define ADF_DH895XCC_FW "qat_895xcc.bin"
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#define ADF_DH895XCC_MMP "qat_895xcc_mmp.bin"
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void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data);
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void adf_clean_hw_data_dh895xcc(struct adf_hw_device_data *hw_data);
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#endif
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