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8fc4e4aa2b
Fixed the eventcode values in the power10 JSON event files to prepend
"0x" since these are hexadecimal values.
The patch also changes the event description of the PM_EXEC_STALL_LOAD_FINISH
and PM_EXEC_STALL_NTC_FLUSH event and move some events to correct files.
Fixes: 32daa5d789 ("perf vendor events: Initial JSON/events list for power10 platform")
Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
Reviewed-by: Paul A. Clarke <pc@us.ibm.com>
Tested-by: Nageswara R Sastry <rnsastry@linux.ibm.com>
Cc: Athira Jajeev <atrajeev@linux.vnet.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lore.kernel.org/lkml/20210525063723.1191514-1-kjain@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
58 lines
2.6 KiB
JSON
58 lines
2.6 KiB
JSON
[
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{
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"EventCode": "0x1003C",
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"EventName": "PM_EXEC_STALL_DMISS_L2L3",
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"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load miss to resolve from either the local L2 or local L3."
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},
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{
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"EventCode": "0x1E054",
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"EventName": "PM_EXEC_STALL_DMISS_L21_L31",
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"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load miss to resolve from another core's L2 or L3 on the same chip."
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},
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{
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"EventCode": "0x34054",
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"EventName": "PM_EXEC_STALL_DMISS_L2L3_NOCONFLICT",
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"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load miss to resolve from the local L2 or local L3, without a dispatch conflict."
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},
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{
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"EventCode": "0x34056",
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"EventName": "PM_EXEC_STALL_LOAD_FINISH",
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"BriefDescription": "Cycles in which the oldest instruction in the pipeline was finishing a load after its data was reloaded from a data source beyond the local L1; cycles in which the LSU was processing an L1-hit; cycles in which the NTF instruction merged with another load in the LMQ; cycles in which the NTF instruction is waiting for a data reload for a load miss, but the data comes back with a non-NTF instruction."
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},
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{
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"EventCode": "0x3006C",
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"EventName": "PM_RUN_CYC_SMT2_MODE",
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"BriefDescription": "Cycles when this thread's run latch is set and the core is in SMT2 mode."
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},
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{
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"EventCode": "0x300F4",
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"EventName": "PM_RUN_INST_CMPL_CONC",
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"BriefDescription": "PowerPC instructions completed by this thread when all threads in the core had the run-latch set."
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},
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{
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"EventCode": "0x4C016",
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"EventName": "PM_EXEC_STALL_DMISS_L2L3_CONFLICT",
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"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load miss to resolve from the local L2 or local L3, with a dispatch conflict."
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},
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{
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"EventCode": "0x4D014",
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"EventName": "PM_EXEC_STALL_LOAD",
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"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a load instruction executing in the Load Store Unit."
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},
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{
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"EventCode": "0x4D016",
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"EventName": "PM_EXEC_STALL_PTESYNC",
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"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a PTESYNC instruction executing in the Load Store Unit."
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},
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{
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"EventCode": "0x401EA",
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"EventName": "PM_THRESH_EXC_128",
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"BriefDescription": "Threshold counter exceeded a value of 128."
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},
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{
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"EventCode": "0x400F6",
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"EventName": "PM_BR_MPRED_CMPL",
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"BriefDescription": "A mispredicted branch completed. Includes direction and target."
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}
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]
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